IP Library Granted Patent US 10,411,735
Granted Patent B1
US 10,411,735 · App. 15/693,709 · Granted Sep 10, 2019

Systems and methods for an iterative decoding scheme

Inventors: Shashi Kiran Chilappagari (San Jose, CA); Dung Viet Nguyen (San Jose, CA); Phong Sy Nguyen (Ho Chi Minh, VN)
Assignee: Marvell International Ltd.
H03M13/1105H03M13/3746H03M13/1111H03M13/1128
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Quick Facts
Patent No.
US 10,411,735
App. No.
15/693,709
Filed
Sep 1, 2017
Granted
Sep 10, 2019
Kind
B1
Art Unit
2112
USPC
714/776
Abstract

System and methods described herein includes a method for iterative decoding. The method includes instantiating an iterative decoding procedure to decode a codeword. At each iteration of the iterative decoding procedure, the method further includes retrieving information relating to a plurality of current decoding variables at a current iteration, determining a first current decoding variable to be skipped for the current iteration based on the information, and processing a second decoding variable without processing the first decoding variable to update related decoding variables from the plurality of current decoding variables.

Claims (67)

1. A method for iterative decoding, the method comprising:

instantiating, via a decoding processor, an iterative decoding procedure for decoding a codeword; and

at each iteration of the iterative decoding procedure:

retrieving, from a syndrome memory unit, a plurality of decoding variables generated from the codeword and a respective characteristic associated with each of the plurality of decoding variables, and assigning, in reliance upon respective characteristics, a respective group number indicative of an order that the plurality of the decoding variables are to be processed at the respective iteration,

updating at least a first subset of the plurality of decoding variables and each respective characteristic associated with each of the first subset of the plurality of decoding variables according to the order that the plurality of the decoding variables are to be processed based on the assigned respective group number; and

storing, at the syndrome memory unit, updated respective characteristics associated with the first subset of the plurality of decoding variables for processing at least a second subset of the plurality of decoding variables at a next iteration.

2. The method of claim 1 , wherein the respective characteristic associated with each of the plurality of decoding variables comprises a maximum number of satisfied checks associated with the respective decoding variable.

3. The method of claim 1 , wherein the updating at least a first subset of the plurality of decoding variables and each respective characteristic associated with each of the first subset of the plurality of decoding variables to the order comprises:

calculating, by the decoding processor, a respective maximum satisfied checks indicator relating to each decoding variable based at least in part on a comparison of a respective number of satisfied checks associated with the respective decoding variable; and

assigning the respective group number to each respective decoding variable by ranking the plurality of decoding variables based on the respective maximum satisfied checks indicator.

4. The method of claim 3 , further comprising:

assigning the respective group number to the respective decoding variable to indicate whether the respective decoding variable is to be processed or an order when the respective decoding variable is to be processed at the current iteration.

5. The method of claim 4 , further comprising:

assigning the respective group number to the respective decoding variable to indicate a number of subsequent iterations to skip for the respective decoding variable.

6. The method of claim 4 , further comprising:

updating the respective group number for each respective decoding variable from a subset of the plurality of decoding variables at the end of the respective iteration after the first subset of the plurality of decoding variables have been updated.

7. The method of claim 1 , further comprising:

retrieving a skip counter status associated with each of the plurality of decoding variables; and

determining a number of subsequent iterations for a respective decoding variable to be skipped based on the skip counter status.

8. The method of claim 1 , further comprising:

dividing the plurality of decoding variables into a first group and a second group based on the characteristic associated with each decoding variable; and

processing decoding variables in the second group before decoding variables in the first group at the respective iteration.

9. The method of claim 1 , further comprising:

storing, at a flag memory unit that is separate from the syndrome memory unit, a flag vector associated with the plurality of decoding variables to at least partially indicate a decoding status of the plurality of decoding variables.

10. The method of claim 1 , further comprising:

retrieving, by the decoding processor, and from a syndrome memory unit, a block column by reading entries of the block column from the syndrome memory unit at the respective iteration;

caching, at a buffer that is different from the syndrome memory unit, the entries of the block column; and

reading, from the buffer, a subset of the entries of the block column for decoding without reading the entire block column at a subsequent iteration.

11. The method of claim 10 , wherein the reading, from the buffer, a subset of the entries of the block column for decoding without reading the entire block column at a subsequent iteration further comprises:

at the subsequent iteration:

determining that the block column is to be skipped by reading a flag vector from a flag memory unit, and

continuing decoding without reading the block column from the syndrome memory unit.

12. A system for iterative decoding, the system comprising:

a syndrome memory unit configured to store a plurality of decoding variables generated from a codeword and a respective characteristic associated with each of the plurality of decoding variables; and

a decoding processor configured to:

assign a respective group number indicative of an order that the plurality of the decoding variables are to be processed during a given iteration based on the respective characteristics;

instantiate an iterative decoding procedure for decoding a codeword; and

at each iteration of the iterative decoding procedure:

retrieve, from the syndrome memory unit, the plurality of decoding variables corresponding to at the respective iteration,

update at least a first subset of the plurality of decoding variables and each respective characteristic associated with each of the first subset of the plurality of decoding variables according to the order that the plurality of the decoding variables are to be processed based on the assigned respective group number; and

store, at the syndrome memory unit, updated respective characteristics associated with the first subset of the plurality of decoding variables for processing at least a second subset of the plurality of decoding variables at a next iteration.

13. The system of claim 12 , wherein the respective characteristic associated with each of the plurality of decoding variables comprises a maximum number of satisfied checks associated with the respective decoding variable.

14. The system of claim 12 , wherein the decoding processor is further configured, when updating at least the first subset of the plurality of decoding variables and each respective characteristic associated with each of the first subset of the plurality of decoding variables according to the order, to:

calculate, by the decoding processor, a respective maximum satisfied checks indicator relating to each decoding variable based at least in part on a comparison of a respective number of satisfied checks associated with the respective decoding variable; and

assign the respective group number to each respective decoding variable by ranking the plurality of decoding variables based on the respective maximum satisfied checks indicator.

15. The system of claim 14 , wherein the decoding processor is further configured to:

assign the respective group number to the respective decoding variable to indicate whether the respective decoding variable is to be processed or an order when the respective decoding variable is to be processed at the current iteration.

16. The system of claim 15 , wherein the decoding processor is further configured to:

assign the respective group number to the respective decoding variable to indicate a number of subsequent iterations to skip for the respective decoding variable.

17. The system of claim 15 , wherein the decoding processor is further configured to:

update the respective group number for each respective decoding variable from a subset of the plurality of decoding variables at the end of the respective iteration after the first subset of the plurality of decoding variables have been updated.

18. The system of claim 12 , wherein the decoding processor is further configured to:

retrieve, from the syndrome memory unit, a skip counter status associated with each of the plurality of decoding variables; and

determine a number of subsequent iterations for a respective decoding variable to be skipped based on the skip counter status.

19. The system of claim 12 , wherein the decoding processor is further configured to:

divide the plurality of decoding variables into a first group and a second group based on the characteristic associated with each decoding variable; and

process decoding variables in the second group before decoding variables in the first group at the respective iteration.

20. The system of claim 12 , further comprising:

a flag memory unit that is separate from the syndrome memory unit, the flag memory unit being configured to store a flag vector associated with the plurality of decoding variables to at least partially indicate a decoding status of the plurality of decoding variables.

21. The system of claim 12 , wherein the decoding processor is further configured to:

retrieve, from the syndrome memory unit, a block column by reading entries of the block column from the syndrome memory unit at the respective iteration;

cache, at a buffer that is different from the syndrome memory unit, the entries of the block column; and

read, from the buffer, a subset of the entries of the block column for decoding without reading the entire block column at a subsequent iteration.

22. The system of claim 21 , wherein the wherein the decoding processor is further configured to:

at the subsequent iteration:

determining the block column is to be skipped by reading a flag vector from a flag memory unit, and

continuing decoding without reading the block column from the syndrome memory unit.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 16, 2020
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE, LTD.
Reel/Frame 053475/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2020
From: MARVELL INTERNATIONAL LTD.
To: CAVIUM INTERNATIONAL
Reel/Frame 052918/0001 →
Continuity (2)
Continuation 14855829 · Sep 16, 2015
Provisional Application 62054088 · Sep 23, 2014
Cited By (2)
US 12,244,428 US 12,705,134