IP Library › Granted Patent US 10,418,781
Granted Patent B1
US 10,418,781 · App. 16/028,573 · Granted Sep 17, 2019

Quantum well passivation structure for laser facets

Inventor: Abram Jakubowicz (Pfaeffikon SZ, CH)
Assignee: II-VI Delaware, Inc.
H01S5/06825H01S5/0282H01S5/2228H01S5/3407H01S5/4043
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Quick Facts
Patent No.
US 10,418,781
App. No.
16/028,573
Granted
Sep 17, 2019
Kind
B1
Abstract

An edge-emitting laser diode is formed to include a quantum well passivation structure comprising alternating thin layers of a semiconductor material (e.g., silicon, germanium, or antimony) and a dielectric barrier. The semiconductor layers are sufficiently thin to form quantum wells, with the dielectric layers functioning as barriers between adjacent quantum wells. The semiconductor layer adjacent to the facet is formed of crystalline material, with the remaining quantum wells formed of amorphous material. The structure, and the method of forming the structure, results in a configuration that exhibits higher levels of COD than devices using a bulk (thick) silicon passivation layer.

Claims (28)

1. A method of forming a passivation structure over a facet of an edge-emitting laser diode, comprising:

a) depositing, in a reaction chamber, a thin layer of amorphous semiconductor material to cover an exposed laser facet surface, the exposed laser facet surface being as-cleaved or post-cleaved conditioned, with the thickness of the deposited amorphous semiconductor material controlled to create a quantum well structure; and

b) forming a thin layer of dielectric material over the quantum well structure, the thickness of the formed dielectric material controlled to create a quantum barrier for the quantum well structure.

2. The method as defined in claim 1 , wherein the method further comprises the step of

c) repeating steps a) and b) to form a multiple quantum well passivation structure of alternating semiconductor quantum wells and quantum barriers.

3. The method as defined in claim 2 wherein each deposited semiconductor layer exhibits a thickness of about 3 nm or less.

4. The method as defined in claim 1 wherein the method further comprises the step of performing a conditioning of the thin layer of amorphous semiconductor material deposited in step a).

5. The method as defined in claim 1 wherein in performing step a) a semiconductor material selected from the group of silicon, germanium, and antimony is deposited.

6. The method as defined in claim 5 wherein the selected semiconductor material is in a pure form.

7. The method as defined in claim 5 wherein the selected semiconductor material is in a hydrogenated form.

8. The method as defined in claim 1 wherein the semiconductor layer deposited in step a) exhibits a thickness of about 3 nm or less.

9. The method as defined in claim 1 wherein step b) comprises the step of oxidizing a surface portion of the semiconductor material deposited in step a).

10. The method as defined in claim 1 wherein in performing step b), the dielectric material is selected from the group consisting of: oxides of silicon, germanium, antimony; nitrides of silicon, germanium antimony; aluminum oxide; titanium oxide; aluminum nitride; and tantalum oxide.

11. The method as defined in claim 1 wherein the method is performed on a laser bar comprising a plurality of separate laser diodes.

12. An edge-emitting laser diode comprising

a semiconductor substrate having a waveguide structure formed thereon for generating light at an operating wavelength;

a pair of cleaved facets formed on opposing faces of the waveguide structure;

a passivation structure comprising a quantum well configuration of at least one semiconductor quantum well and a dielectric quantum barrier formed on the semiconductor quantum well; and

a reflective coating formed directly over the passivation structure.

13. The edge-emitting laser diode as defined in claim 12 wherein the at least one semiconductor quantum well comprises a single semiconductor quantum well.

14. The edge-emitting laser diode as defined in claim 13 wherein the single semiconductor quantum well comprises a layer of crystalline material.

15. The edge-emitting laser diode as defined in claim 12 wherein the at least one semiconductor quantum well comprises a plurality of semiconductor quantum wells, separated by quantum barrier layers to create a multiple quantum well structure.

16. The edge-emitting laser diode as defined in claim 15 wherein a first semiconductor quantum well, disposed adjacent to the facet, comprises crystalline material, with the remaining quantum wells comprising amorphous material.

17. The edge-emitting laser diode as defined in claim 12 wherein each semiconductor quantum well comprises a layer of material having a thickness no greater than about 3 nm.

18. The edge-emitting laser diode as defined in claim 12 wherein the semiconductor material is selected from the group consisting of: silicon, germanium, and antimony.

19. The edge-emitting laser diode as defined in claim 18 wherein the selected semiconductor material is in a pure form.

20. The edge-emitting laser diode as defined in claim 18 wherein the selected semiconductor material is in a hydrogenated form.

21. The edge-emitting laser diode as defined in claim 12 wherein the dielectric quantum barrier comprises a material is selected from the group consisting of: oxides of silicon, germanium, antimony; nitrides of silicon, germanium antimony; aluminum oxide; titanium oxide; aluminum nitride; and tantalum oxide.

Assignments (2)
SECURITY INTEREST Recorded Jul 1, 2022
From: II-VI INCORPORATED; II-VI DELAWARE, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; PHOTOP TECHNOLOGIES, INC.; COHERENT, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 060562/0254 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 6, 2018
From: JAKUBOWICZ, ABRAM
To: II-VI DELAWARE, INC.
Reel/Frame 046278/0696 →
Cited By (1)
US 12,255,434