High-efficiency high-integrated receiver
A high-efficiency high-integrated receiver is provided. The radar receiver according to an embodiment of the present disclosure includes a receiver configured to receive a radar signal, a processor configured to attenuate a magnitude of a low frequency band of the received signal of the receiver, a filter configured to perform a low pass filtering on an output signal of the processor, and an ADC configured to A/D convert the output signal of the filter. Accordingly, it is possible to demodulate all the signals being reflected from targets in various distances when even using a low resolution ADC, thereby reducing the manufacturing cost and power consumption.
1. A single-chip radar receiver comprising:
a receiver circuit configured to receive a radar signal having a low frequency component;
a level adjustment low pass filter (ALPF) connected to the receiver circuit and configured to process the received radar signal to generate an analog output signal;
an analog-to-digital converter (ADC) connected to the ALPF and configured to convert the analog output signal of the ALPF into a digital signal,
wherein the ALPF comprises:
a first high pass filter (HPF) configured to attenuate the low frequency component of the radar signal to generate an output signal, the first HPF having a first corner frequency;
a first amplifier configured to first amplify the output signal of the first HPF, the first amplified output signal including a low frequency component;
a second HPF configured to attenuate the low frequency component of the first amplified output signal, the second HPF having a second corner frequency;
a second amplifier configured to second amplify an output signal of the second HPF;
a low pass filter (LPF) configured to perform low pass filtering on the second amplified output signal to generate an LPF output; and
a buffer configured to amplify the LPF output to compensate gain attenuation of the first HPF, the first amplifier, the second HPF, the second amplifier, and the LPF,
wherein the second corner frequency is configured to be set to a frequency lower than the first corner frequency, and wherein the second amplifier is configured to be set to have an amplification gain less than that of the first amplifier to compensate lower corner frequency setting of the second HPF.
2. The radar receiver of claim 1 , wherein the first corner frequency is equal to or lower than a predetermined highest frequency of the radar signal.
3. The radar receiver of claim 1 , wherein the first amplifier comprises:
one pair of first transistors; and
first amps configured to negative feedback an emitter of the first transistors to a gate, and amplify a gain of the first transistors, and
wherein the second amplifier comprises:
one pair of second transistors; and
second amps configured to negative feedback an emitter of the second transistors to the gate, and amplify a gain of the second transistors.
4. The radar receiver of claim 3 , wherein the gain of the first amplifier is configured to be adjusted by a ratio of an first resistance that connects drains of the first transistors and a second resistance that connects the emitters of the first transistors, and
wherein the gain of the second amplifier is configured to be adjusted by a ratio of a third resistance that connects drains of the second transistors and a forth resistance that connects the emitters of the second transistors.