Power electronics package and method of manufacturing thereof

1. An electronics package comprising:

a glass substrate having an exterior portion surrounding an interior portion thereof, wherein the interior portion has a first thickness and the exterior portion has a second thickness larger than the first thickness;

an adhesive layer formed on a lower surface of the interior portion of the glass substrate;

a semiconductor device having an upper surface coupled to the adhesive layer, the semiconductor device having at least one contact pad disposed on the upper surface thereof;

a first metallization layer coupled to an upper surface of the glass substrate and extending through a first via formed through the first thickness of the glass substrate to couple with the at least one contact pad of the semiconductor device; and

a conductive substrate having a first portion coupled to a lower surface of the semiconductor device and a second portion coupled to the exterior portion of the glass substrate.

2. The electronics package of claim 1 wherein a difference between the coefficient of thermal expansion of the glass substrate and the coefficient of thermal expansion of the semiconductor device is equal to or less than 7 ppm/° C.

3. The electronics package of claim 1 wherein the semiconductor device comprises a power device.

4. The electronics package of claim 1 further comprising a second metallization layer coupled to a lower surface of the exterior portion of the glass substrate;

wherein the first metallization layer and the second metallization layer electrically connect within a second via formed through the second thickness of the glass substrate.

5. The electronics package of claim 4 further comprising a passive device coupled to the adhesive layer; and

wherein the passive device is electrically connected to the first metallization layer.

6. The electronics package of claim 1 further comprising a conductive shim positioned adjacent a bottom surface of the glass substrate and electrically coupled to the first metallization layer.

7. The electronics package of claim 1 further comprising:

a conductive substrate coupled to a lower surface of the semiconductor device; and

a second joining layer positioned between the conductive substrate and the exterior portion of the glass substrate, the second joining layer surrounding at least a subsection of the interior portion of the glass substrate.

8. The electronics package of claim 7 wherein the second joining layer comprises a material that hermetically seals the semiconductor device within an interior cavity of the electronics package.

9. The electronics package of claim 7 wherein the second joining material is directly coupled to the lower surface of the outer portion of the glass substrate.

10. The electronics package of claim 7 further comprising an encapsulant that fills a cavity positioned between the glass substrate and the conductive substrate and surrounds the semiconductor device.

11. A method of manufacturing an electronics package comprising:

providing a glass substrate having an interior portion surrounded by an exterior portion, the exterior portion having a thickness greater than a thickness of the interior portion;

forming an adhesive layer on a lower surface of the interior portion of the glass substrate;

coupling an upper surface of a semiconductor device to the glass substrate by way of the adhesive layer, the upper surface comprising at least one contact pad;

coupling a first portion of a conductive substrate to a lower surface of the semiconductor device;

coupling a second portion of the conductive substrate to the exterior portion of the glass substrate; and

forming a first metallization layer on the glass substrate, the first metallization layer extending through at least one via formed through the thickness of the interior portion of the glass substrate to connect to the at least one contact pad of the semiconductor device.

12. The method of claim 11 further comprising:

coupling a bottom surface of the semiconductor device to a conductive substrate using a first joining layer, the conductive substrate comprising a ceramic layer with metal structures applied thereto; and

coupling the outer portion of the glass substrate to the conductive substrate using a second joining layer.

13. The method of claim 12 further comprising coupling a bottom surface of the outer portion of the glass substrate directly to the conductive substrate using a glass frit or liquid crystalline polymer bond.

14. The method of claim 11 further comprising forming a second metallization layer on a bottom surface of the exterior portion of the glass substrate.

15. The method of claim 14 further comprising electrically coupling the first metallization layer to the second metallization layer through a via that extends through the thickness of the exterior portion of the glass substrate.

16. The method of claim 15 further comprising:

coupling a passive device to the glass substrate by way of the adhesive layer; and

electrically coupling the passive device to the first metallization layer and to the second metallization layer.