Method and apparatus for coding/decoding in a communication or broadcasting system using high-order modulation

1. A method for coding a channel in a communication system, the method comprising:

coding information to be transmitted with an outer code;

generating an input sequence by allocating outer coded symbols of the outer coded information sequentially from a sub-channel having a large capacity based on a polar code sequence, the input sequence having a value of 2n and n being a preset value;

coding the input sequence with the polar code;

interleaving polar coded symbols of the polar coded input sequence according to a predetermined scheme in consideration of a modulation symbol; and

modulating the interleaved polar coded symbols.

2. The method of claim 1 ,

wherein the polar code sequence is designed in consideration of a binary phase shift keying (BPSK) or quadrature phase shift keying (QPSK) modulation scheme, and

wherein, when the modulation scheme uses more than a quadrature amplitude modulation (QAM) modulation scheme, in the interleaving, the interleaving is performed using a bits-to-symbol mapping matrix based on reliability depending on locations of bits configuring each modulation symbol.

3. The method of claim 2 , wherein, when the polar code bits having a longer length than the bits-to-symbol mapping matrix upon the interleaving are transmitted, the interleaving is performed repeatedly in the bits-to-symbol mapping matrix in the polar code sequence.

4. The method of claim 2 , wherein the bits-to-symbol mapping matrix is configured to:

calculate first mutual information for each bit location on a signal to noise ratio (SNR) basis in an additive white Gaussian noise (AWGN) channel,

calculate second mutual information for each subchannel every possible bit-symbol mapping by either of density evolution or Gaussian approximation, and

calculate a difference between the polar code sequence and a target code sequence using the second mutual information to select and configure bits-to-symbol mapping having a smallest difference.

5. The method of claim 2 , wherein the bits-to-symbol mapping matrix is configured to:

be set as a matrix equal to or larger than a device configuring one QAM symbol, and

maximize a separation between bits belonging to one QAM symbol.

6. The method of claim 5 , wherein, when the bits-to-symbol mapping matrix is used for the polar coded symbols coded with the polar code twice or more, interleaving between the bits-to-symbol mapping matrices is further performed corresponding to a size of the bits-to-symbol mapping matrix.

7. The method of claim 6 , wherein the interleaving between the bits-to-symbol mapping matrices comprises:

sequentially arranging rows in a device interleaved by the bits-to-symbol mapping matrix;

rearranging each row by row-permuting an order of the respective rows in a bit-reversal order;

rearranging bits arranged in each column by cyclically shifting the bits by each row index per row; and

rearranging bits arranged in each column by cyclically shifting the bits by each column index per column.

8. The method of claim 1 , wherein the allocating of the outer coded symbols to the channel comprises:

determining a location where information is not carried by puncturing or shortening performed to adjust a length of a code after the outer coding is performed; and

generating an input sequence by mapping the outer coded symbols to a bit other than the determined location.

9. The method of claim 1 , wherein the allocating of the outer coded symbols to the channel by mapping the outer coded symbols to the bit sequence comprises:

generating a predetermined number of parity bits by performing a predetermined pre-coding on the outer coded symbol; and

generating the input sequence using both of the generated parity bit and the outer coded symbol.

10. The method of claim 1 , wherein the interleaving further comprises performing rate matching when the length of the polar-coded symbol is longer than the length of the symbol of the code transmitted as the modulation symbol.

11. The method of claim 1 , wherein the outer code includes at least one of an error detection code including a cyclic redundancy check (CRC) code or an error-correcting code including at least one of a Bose, Chaudhuri, and Hocquenghem (BCH) code or a single parity check code.

12. An apparatus for coding a channel in a communication system, the apparatus comprising:

an outer coder configured to code information to be transmitted with an outer code;

a subchannel allocator configured to generate an input sequence by allocating outer coded symbols of the outer coded information sequentially from a sub-channel having a large capacity based on a polar code sequence, the input sequence having a value of 2 n and n being a preset value;

a polar code coder configured to perform polar code coding on the polar code sequence in a predetermined scheme;

an interleaver configured to interleave polar coded symbols of the polar coded input sequence by a predetermined scheme; and

a modulator configured to modulate the interleaved polar coded symbols.

13. The apparatus of claim 12 , wherein the interleaver is further configured to:

design the polar code sequence in consideration of a binary phase shift keying (BPSK) or quadrature phase shift keying (QPSK) modulation scheme, and

perform the interleaving using a bits-to-symbol mapping matrix based on reliability depending on locations of bits configuring each modulation symbol when the modulation scheme uses more than a quadrature amplitude modulation (QAM) modulation scheme.

14. The apparatus of claim 13 , wherein the interleaver is further configured to repeatedly perform the interleaving in the bits-to-symbol mapping matrix in the polar code sequence when the polar code bits having a longer length than the bits-to-symbol mapping matrix upon the interleaving are transmitted.

15. The apparatus of claim 13 , wherein the bits-to-symbol mapping matrix is configured to:

calculate first mutual information for each bit location on a signal to noise ratio (SNR) basis in an additive white Gaussian noise (AWGN) channel,

calculate second mutual information for each subchannel every possible bit-symbol mapping by either of density evolution or Gaussian approximation, and

calculate a difference between the polar code sequence and a target code sequence using the second mutual information to select and configure bits-to-symbol mapping having a smallest difference.

16. The apparatus of claim 13 , wherein the bits-to-symbol mapping matrix is configured to:

be set as a matrix equal to or larger than a device configuring one QAM symbol, and

maximize a separation between bits belonging to one QAM symbol.

17. The apparatus of claim 16 , wherein, when the bits-to-symbol mapping matrix is used for the polar coded symbols coded with the polar code twice or more, interleaving between the bits-to-symbol mapping matrices is further performed corresponding to a size of the bits-to-symbol mapping matrix.

18. The apparatus of claim 17 , wherein the interleaving between the bits-to-symbol mapping matrices comprises:

sequentially arranging rows in a device interleaved by the bits-to-symbol mapping matrix;

rearranging each row by row-permuting an order of the respective rows in a bit-reversal order;

rearranging bits arranged in each column by cyclically shifting the bits by each row index per row; and

rearranging bits arranged in each column by cyclically shifting the bits by each column index per column.

19. The apparatus of claim 12 , wherein the subchannel allocator is further configured to:

determine a location where information is not carried by puncturing or shortening performed to adjust a length of a code after the outer coding is performed, and

generate an input sequence by mapping the outer coded symbols to a bit other than the determined location.

20. The apparatus of claim 12 , wherein the allocating of the outer coded symbols to the channel by mapping the outer coded symbols to the bit sequence generates a predetermined number of parity bits by predetermined pre-coding and generates the input sequence using both of the generated parity bit and the outer coded symbol.

21. The apparatus of claim 12 , wherein the interleaver is further configured to perform rate matching when the length of the polar-coded symbol is longer than the length of the symbol of the code transmitted as the modulation symbol.

22. The apparatus of claim 12 , wherein the outer code includes at least one of an error detection code including a cyclic redundancy check (CRC) code or an error-correcting code including at least one of a Bose, Chaudhuri, and Hocquenghem (BCH) code or a single parity check code.