Frequency-scalable NLTL-based mm-wave vector signal de-modulator
An in-phase (I) and quadrature (Q) demodulator includes an input for receiving a signal, a reference frequency source, and a sampler connected with the input. The sampler includes a sampler strobe connected with the reference frequency source, and a non-linear transmission line (NLTL) connected with the sampler strobe. The NLTL receives a strobe signal generated by the sampler strobe and multiplies a frequency of the strobe signal to generate a sampler signal. When the sampler receives a signal from the input, the sampler is configured to generate and output an intermediate frequency (IF) signal using the sampler signal. A splitter of the demodulator separates the IF signal into an in-phase (I) component and a quadrature (Q) component. Mixers receive the I and Q components and generate I and Q output signals shifted 90° in phase.
1. An in-phase (I) and quadrature (Q) demodulator, comprising:
an input for receiving a signal into the I and Q demodulator;
a reference frequency source;
a sampler connected with the input and including
a sampler strobe connected with the reference frequency source, and
a non-linear transmission line (NLTL) connected with the sampler strobe, wherein the NLTL receives a strobe signal generated by the sampler strobe and multiplies a frequency of the strobe signal to generate a sampler signal;
wherein when the sampler receives the signal from the input, the sampler is configured to generate and output an intermediate frequency (IF) signal using the sampler signal;
a splitter for separating the IF signal into an in-phase (I) component and a quadrature (Q) component;
a first mixer that receives the I component and a local oscillator (LO) signal generated based on the reference frequency source and outputs an I output signal; and
a second mixer that receives the Q components and the LO signal shifted 90° in phase and outputs a Q output signal.
2. The demodulator of claim 1 , further comprising:
a first analog-to-digital converter (ADC) that receives the I output signal and generates a digital I output signal;
a second ADC that receives the Q output signal and generates a digital Q output signal; and
a field-programmable gate array (FPGA)-based processor that receives the digital I output signal and the digital Q output signal;
wherein the FPGA-based processor is configured to apply digital signal processing (DSP) techniques to calculate an amplitude and a phase shift of the signal received at the input.
3. The demodulator of claim 1 , further comprising:
a first analog-to-digital converter (ADC) that receives the I output signal and generates a digital I output signal;
a second ADC that receives the Q output signal and generates a digital Q output signal; and
a general-purpose computing on graphics processing units (GPGPU)-based processor that receives the digital I output signal and the digital Q output signal;
wherein the GPGPU-based processor is configured to apply digital signal processing (DSP) techniques to calculate an amplitude and a phase shift of the signal received at the input.
4. The demodulator of claim 1 , wherein the NLTL comprises a varactor diode-loaded transmission line.
5. The demodulator of claim 1 , wherein the input is switchable between frequency bands.
6. A vector signal analyzer, comprising;
a signal transmitter; and
a receiver having an in-phase (I) and quadrature (Q) demodulator including
an input,
a reference frequency source,
a sampler connected with the input and including
a sampler strobe connected with the reference frequency source, and
a non-linear transmission line (NLTL) connected with the sampler strobe, wherein the NLTL receives a strobe signal generated by the sampler strobe and multiplies a frequency of the strobe signal to generate a sampler signal,
wherein when the sampler receives a signal from the input, the sampler is configured to generate and output an intermediate frequency (IF) signal using the sampler signal,
a splitter for separating the IF signal into an in-phase (I) component and a quadrature (Q) component,
a first mixer that receives the I component and a local oscillator (LO) signal generated based on the reference frequency source and outputs an I output signal, and
a second mixer that receives the Q components and the LO signal shifted 90° in phase and outputs a Q output signal.
7. The vector signal analyzer of claim 6 , wherein the receiver further includes
a first analog-to-digital converter (ADC) that receives the I output signal and generates a digital I output signal,
a second ADC that receives the Q output signal and generates a digital Q output signal, and
a field-programmable gate array (FPGA)-based processor that receives the digital I output signal and the digital Q output signal,
wherein the FPGA-based processor is configured to apply digital signal processing (DSP) techniques to calculate an amplitude and a phase shift of the signal received at the input.
8. The vector signal analyzer of claim 6 , wherein the receiver further includes
a first analog-to-digital converter (ADC) that receives the I output signal and generates a digital I output signal,
a second ADC that receives the Q output signal and generates a digital Q output signal, and
a general-purpose computing on graphics processing units (GPGPU)-based processor that receives the digital I output signal and the digital Q output signal,
wherein the GPGPU-based processor is configured to apply digital signal processing (DSP) techniques to calculate an amplitude and a phase shift of the signal received at the input.
9. The vector signal analyzer of claim 6 , wherein the NLTL of the demodulator comprises a varactor diode-loaded transmission line.
10. The vector signal analyzer of claim 6 , wherein the input of the receiver is switchable between frequency bands.
11. The vector signal analyzer of claim 7 , further comprising a tether connectable with a communication interface of an external computer adapted to display calculations of the vector signal analyzer.
12. The vector signal analyzer of claim 7 , further comprising a display for displaying calculations of the vector signal analyzer.
13. A method of measuring an electrical response of a device comprising:
using a vector signal analyzer including a receiver having a demodulator,
wherein the demodulator includes
an input for receiving a signal,
a reference frequency source,
a sampler connected with the input and including
a sampler strobe connected with the reference frequency source, and
a non-linear transmission line (NLTL) connected with the sampler strobe, wherein the NLTL receives a strobe signal generated by the sampler strobe and multiplies a frequency of the strobe signal to generate a sampler signal,
wherein when the sampler receives the signal from the input, the sampler is configured to generate and output an intermediate frequency (IF) signal using the sampler signal,
a splitter for separating the IF signal into an in-phase (I) component and a quadrature (Q) component,
a first mixer that receives the I component and a local oscillator (LO) signal generated based on the reference frequency source and outputs an I output signal, and
a second mixer that receives the Q components and the LO signal shifted 90° in phase and outputs a Q output signal; and
receiving the signal from the device at the input of the demodulator; and
generating measurement data for the device based on the I output signal and the Q output signal of the demodulator.
14. The method of claim 13 , wherein generating measurement data for the device includes calculating an amplitude and a phase shift of the signal received at the input of the demodulator.
15. The method of claim 13 , wherein the receiver further includes
a first analog-to-digital converter (ADC) that receives the I output signal and generates a digital I output signal,
a second ADC that receives the Q output signal and generates a digital Q output signal, and
a field-programmable gate array (FPGA)-based processor that receives the digital I output signal and the digital Q output signal,
wherein the FPGA-based processor is configured to apply digital signal processing (DSP) techniques to calculate an amplitude and a phase shift of the signal received at the input.
16. The method of claim 13 , further comprising:
connecting the vector signal analyzer to an external computer using a tether; and
displaying, on a display of the external computer, the measurement data for the device.