Semiconductor device
View Patent ↗A transistor which is resistant to a short-channel effect is provided. The transistor includes a first conductor in a ring shape, an oxide semiconductor including a region extending through an inside of a ring of the first conductor, a first insulator between the first conductor and the oxide semiconductor, a second insulator between the first conductor and the first insulator, and a charge trap layer inside the ring of the first conductor. The charge trap layer is inside the second insulator and configured to be in a floating state.
1. A semiconductor device comprising:
a first conductor, the first conductor being a first ring-shaped conductor;
an oxide semiconductor comprising a region extending through an inside of a ring of the first conductor;
a first insulator between the first conductor and the oxide semiconductor;
a second insulator between the first conductor and the first insulator; and
a second conductor inside the ring of the first conductor,
wherein the second conductor is inside the second insulator,
wherein the second conductor is configured to be in a floating state,
wherein an inner surface and an outer surface of the second conductor are in contact with the second insulator, and
wherein the inner surface of the second conductor faces to the first insulator.
2. The semiconductor device according to claim 1 ,
wherein the second conductor is a second ring-shaped conductor.
3. The semiconductor device according to claim 1 , further comprising:
a third conductor and a fourth conductor with the first conductor sandwiched therebetween,
wherein the oxide semiconductor comprises a first region overlapping with the first conductor, a second region overlapping with the third conductor, and a third region overlapping with the fourth conductor,
wherein the oxide semiconductor comprises a fourth region between the first region and the second region, and a fifth region between the first region and the third region,
wherein the fourth region overlaps with neither the first conductor nor the third conductor, and
wherein the fifth region overlaps with neither the first conductor nor the fourth conductor.
4. The semiconductor device according to claim 3 ,
wherein a length of the fourth region of the oxide semiconductor in a channel length direction is more than or equal to 2 nm and less than or equal to 10 nm, and
wherein a length of the fifth region of the oxide semiconductor in the channel length direction is more than or equal to 2 nm and less than or equal to 10 nm.
5. The semiconductor device according to claim 4 ,
wherein a length of the first conductor in the channel length direction is more than or equal to 4 nm and less than or equal to 30 nm.
6. The semiconductor device according to claim 1 ,
wherein the first insulator comprises at least one of indium, an element M, and zinc, and
wherein the element M is titanium, gallium, yttrium, zirconium, lanthanum, cerium, neodymium, tin, or hafnium.
7. The semiconductor device according to claim 1 ,
wherein the oxide semiconductor comprises indium, an element M, zinc, and oxygen, and
wherein the element M is titanium, gallium, yttrium, zirconium, lanthanum, cerium, neodymium, tin, or hafnium.
8. A semiconductor device comprising:
a first conductor, the first conductor being a first ring-shaped conductor;
an oxide semiconductor comprising a region extending through an inside of a ring of the first conductor;
a first insulator between the first conductor and the oxide semiconductor;
a second insulator between the first conductor and the first insulator; and
a third insulator inside the ring of the first conductor,
wherein the third insulator is inside the second insulator,
wherein the third insulator has a higher relative dielectric constant than the second insulator,
wherein an inner surface and an outer surface of the third insulator are in contact with the second insulator, and
wherein the inner surface of the third insulator faces to the first insulator.
9. The semiconductor device according to claim 8 ,
wherein the second insulator comprises nitrogen and silicon.
10. The semiconductor device according to claim 8 ,
wherein the third insulator is a second ring-shaped insulator.
11. The semiconductor device according to claim 8 , further comprising:
a third conductor and a fourth conductor with the first conductor sandwiched therebetween,
wherein the oxide semiconductor comprises a first region overlapping with the first conductor, a second region overlapping with the third conductor, and a third region overlapping with the fourth conductor,
wherein the oxide semiconductor comprises a fourth region between the first region and the second region, and a fifth region between the first region and the third region,
wherein the fourth region overlaps with neither the first conductor nor the third conductor, and
wherein the fifth region overlaps with neither the first conductor nor the fourth conductor.
12. The semiconductor device according to claim 11 ,
wherein a length of the fourth region of the oxide semiconductor in a channel length direction is more than or equal to 2 nm and less than or equal to 10 nm, and
wherein a length of the fifth region of the oxide semiconductor in the channel length direction is more than or equal to 2 nm and less than or equal to 10 nm.
13. The semiconductor device according to claim 12 ,
wherein a length of the first conductor in the channel length direction is more than or equal to 4 nm and less than or equal to 30 nm.
14. The semiconductor device according to claim 8 ,
wherein the first insulator comprises at least one of indium, an element M, and zinc, and
wherein the element M is titanium, gallium, yttrium, zirconium, lanthanum, cerium, neodymium, tin, or hafnium.
15. The semiconductor device according to claim 8 ,
wherein the oxide semiconductor comprises indium, an element M, zinc, and oxygen, and
wherein the element M is titanium, gallium, yttrium, zirconium, lanthanum, cerium, neodymium, tin, or hafnium.