Printed circuit board

1. A printed circuit board comprising:

an insulating layer;

a first pad disposed on a first surface of the insulating layer;

a first conductive layer disposed on the first pad and including gold (Au);

a second pad disposed on a second surface of the insulating layer; and

a second conductive layer disposed on the second pad and including gold (Au),

wherein the first conductive layer is thicker than the second conductive layer, and

wherein a width of an upper surface of the first pad is larger than that of a lower surface thereof.

2. The printed circuit board of claim 1 , wherein the first conductive layer is a conductive layer connected to a wire, and the second conductive layer is a conductive layer connected to a solder.

3. The printed circuit board of claim 1 , wherein:

the insulating layer includes a plurality of insulating layers;

the first pad is disposed on an upper surface of an insulating layer disposed at an uppermost portion of the plurality of insulating layers; and

the second pad is disposed under a lower surface of an insulating layer disposed at a lowermost portion of the plurality of insulating layers.

4. The printed circuit board of claim 1 , wherein the first pad has a narrower width than the second pad.

5. The printed circuit board of claim 1 , wherein the first conductive layer has a thickness in a range of 0.2 to 0.8 μm, and the second conductive layer has a thickness in a range of 0.05 to 0.3 μm.

6. The printed circuit board of claim 3 , wherein each of the first pad and the second pad includes:

a plating seed layer disposed at a surface of the uppermost insulating layer or the lowermost insulating layer and including copper;

a first pattern disposed on the plating seed layer and including copper; and

a second pattern disposed on the first pattern and including copper.

7. The printed circuit board of claim 6 , wherein the first pattern is thicker than the second pattern.

8. The printed circuit board of claim 6 , wherein a central portion of an upper surface of the first pattern is located lower than an outer side portion thereof.

9. The printed circuit board of claim 8 , wherein a part of a lower surface of the second pattern is located lower than a part of the upper surface of the first pattern.

10. The printed circuit board of claim 6 , wherein each of the first and second conductive layers includes a first region in contact with the second pattern and a second region extending from the first region and spaced apart from the plating seed layer, the first pattern and the second pattern,

wherein the second region is not in contact with the plating seed layer, the first pattern, and the second pattern.

11. The printed circuit board of claim 9 , wherein the second region includes a first portion in direct contact with an upper surface of the second pattern and a second portion in direct contact with a side surface of the second pattern.

12. A printed circuit board comprising:

an insulating layer;

a pad disposed on the insulating layer; and

a conductive layer disposed on the pad,

wherein the conductive layer includes:

a first region in direct contact with an upper surface of the pad, and

a second region extending from the first region and spaced apart from the pad,

wherein the pad includes:

a first pad disposed on a first surface of the insulating layer, and

a second pad disposed on a second surface of the insulating layer opposite to the first surface, and

wherein a width of an upper surface of the first pad is larger than that of a lower surface thereof.

13. The printed circuit board of claim 12 , wherein the conductive layer includes

a third region disposed between the first region and the second region, and in direct contact with a side surface of the pad.

14. The printed circuit board of claim 13 , wherein:

the conductive layer includes a first conductive layer disposed on the first pad and including gold (Au) and a second conductive layer disposed on the second pad and including gold (Au); and

each of the first and second conductive layers includes the first to third regions.

15. The printed circuit board of claim 14 , wherein a thickness of the first region in a longitudinal direction of the first conductive layer is greater than that of the first region in a longitudinal direction of the second conductive layer.

16. The printed circuit board of claim 14 , wherein a thickness of the third region in a lateral direction of the first conductive layer is greater than that of the third region in a lateral direction of the second conductive layer.

17. The printed circuit board of claim 14 , wherein each of the first pad and the second pad includes:

a plating seed layer disposed on the first surface or the second surface of the insulating layer and including copper;

a first pattern disposed on the plating seed layer and including copper; and

a second pattern disposed on the first pattern and including copper.

18. The printed circuit board of claim 17 , wherein an end portion of the second region of the first conductive layer is located higher than an outer side region of an upper surface of the first pattern constituting the first pad, and

an end portion of the second region of the second conductive layer is located lower than an outer side region of a lower surface of the first pattern constituting the second pad.

19. The printed circuit board of claim 14 , wherein a thickness of the second region in a longitudinal direction of the first conductive layer is different from that of the second region in a longitudinal direction of the second conductive layer.

20. The printed circuit board of claim 14 , wherein the first conductive layer is a conductive layer directly connected to a wire, and the second conductive layer is a conductive layer directly connected to a solder.