Sigma-delta modulator
A sigma-delta modulator and method for converting an input voltage such as an analog signal into a digital signal is presented. The modulator may be used as an analog-to-digital converter (ADC). The modulator has a plurality of bias transistors with at least one p-type transistor and at least one n-type transistor. The modulator receives a bias voltage, wherein each bias transistor receives the same bias voltage. This sigma-delta modulator results in reduced power consumption.
1. A sigma-delta modulator for converting an input voltage into a digital signal, comprising:
a plurality of bias transistors comprising at least one p-type transistor and at least one n-type transistor and configured to receive a bias voltage; wherein:
each bias transistor receives the same bias voltage.
2. The sigma-delta modulator of claim 1 , wherein each of the bias transistors receives the bias voltage at its gate.
3. The sigma-delta modulator of claim 1 , wherein the sigma-delta modulator is configured to receive a supply voltage from a voltage regulator that is configured to generate the supply voltage and the bias voltage.
4. The sigma-delta modulator of claim 3 , comprising:
a comparator comprising an inverter configured to receive the supply voltage from the voltage regulator; wherein:
an output voltage of the inverter is dependent on:
a) an input voltage received by the inverter; and
b) the bias voltage.
5. The sigma-delta modulator of claim 1 , comprising an amplifier circuit comprising at least one of the bias transistors.
6. The sigma-delta modulator of claim 5 , comprising an integrator circuit comprising the amplifier circuit.
7. The sigma-delta modulator of claim 5 , comprising a switching circuit; wherein
the switching circuit comprises a current source; and
the current source comprises one of the bias transistors.
8. The sigma-delta modulator of claim 7 , comprising:
an integrator circuit comprising the amplifier circuit, and arranged to generate an integrated voltage signal, wherein:
the switching circuit is arranged to couple the current source to a first input of the amplifier circuit when in a first state; and
the switching circuit is arranged to couple the current source to a second input of the amplifier circuit when in a second state.
9. The sigma-delta modulator of claim 8 , wherein the switching circuit is configured to change state in response to receiving a feedback signal.
10. The sigma-delta modulator of claim 5 , wherein the amplifier circuit comprises a current source comprising one of the bias transistors.
11. The sigma-delta modulator of claim 5 , wherein the amplifier circuit comprises a first cascode current source comprising:
a first bias transistor configured to generate a first current; and
a second bias transistor configured to function as a cascode transistor.
12. The sigma-delta modulator of claim 10 , wherein the amplifier circuit comprises a second cascode current source comprising:
a third bias transistor configured to generate a second current; and
a fourth bias transistor configured to function as a cascode transistor.
13. The sigma-delta modulator of claim 5 , wherein the amplifier circuit comprises a current divider; wherein:
the current divider comprises a current source; and
the current source comprises one of the bias transistors.
14. The sigma-delta modulator of claim 8 , comprising a comparator arranged to receive the integrated voltage signal and to generate the digital signal.
15. The sigma-delta modulator of claim 14 , wherein:
the switching circuit is configured to change state in response to receiving a feedback signal; and
the feedback signal is the digital signal generated by the comparator.
16. The sigma-delta modulator of claim 14 , comprising:
a clock for generating a clock signal; and
a counting circuit, wherein:
the counting circuit is arranged to receive the digital signal; and
to generate a digital value, the digital value being a number of cycles of the clock signal over which the digital signal is in a high logic state during a measurement period.
17. The sigma-delta modulator of claim 1 , wherein the sigma-delta modulator is a multi-bit sigma-delta modulator.
18. The sigma-delta modulator of claim 5 , wherein the amplifier circuit is an operational transconductance amplifier.
19. A method of sigma-delta modulation comprising:
converting an input voltage into a digital signal;
receiving a bias voltage at a plurality of bias transistors comprising at least one p-type transistor and at least one n-type transistor; wherein:
each bias transistor receives the same bias voltage.