IP Library › Granted Patent US 10,580,885
Granted Patent B1
US 10,580,885 · App. 16/557,284 · Granted Mar 3, 2020

Field plates on two opposed surfaces of double-base bidirectional bipolar transistor: devices, methods, and systems

Inventors: William C. Alexander (Spicewood, TX); Richard A. Blanchard (Los Altos, CA)
Assignee: Ideal Power, Inc.
H01L29/747H01L29/0615H01L29/0623H01L29/0642H01L29/1004H01L29/404H01L29/407H01L29/42304H01L29/732H01L29/7325H03K17/66H01L29/705
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Quick Facts
Patent No.
US 10,580,885
App. No.
16/557,284
Granted
Mar 3, 2020
Kind
B1
Abstract

Dual-base two-sided bipolar power transistors which use an insulated field plate to separate the emitter/collector diffusions from the nearest base contact diffusion. This provides a surprising improvement in turn-off performance, and in breakdown voltage.

Claims (14)

1. A method for switching a power semiconductor device having a first and a second n-type emitter/collector region, located respectively on first and second opposite surfaces of a p-type semiconductor die, and a first and second p-type base contact region, located respectively on the first and second surfaces of the semiconductor die, comprising:

in the ON state, driving base current through one, but not both, of the first and second p-type base contact regions to thereby allow passage of current between the first and second n-type emitter/collector regions through the semiconductor die;

wherein, on each surface, the base contact region and the emitter/collector region are laterally separated by a vertically extended conductive field plate, which field plate is completely insulated from any adjacent semiconductor material by a dielectric material, and is connected to the emitter/collector region on the same surface through a common electrode; and

in the OFF state, not driving base current through any of the first and second p-type base contact regions; whereby peak electric field near a junction between the p-type semiconductor die and one of the first and second n-type emitter/collector regions is reduced due to capacitive coupling between the corresponding insulated field plate and the volume of the p-type die, and a breakdown voltage of the semiconductor device is thereby increased.

2. The method of claim 1 , further comprising, at turn-on, shorting the more positive one of the n-type emitter/collector regions together with the base contact region on the same one of the surfaces, to thereby conduct current with a diode voltage drop determined by the junction between that n-type emitter/collector region and the p-type semiconductor die.

3. The method of claim 1 , wherein said step of driving base current drives base current through the base contact region which is nearer the more positive one of the emitter/collector regions, without flowing base current through the other of the base contact regions.

4. The method of claim 1 , further comprising, during transition to the OFF state, temporarily shorting the base contact region on one of said surfaces to the emitter/collector region on the same surface, while also shorting the base contact region on the other of said surfaces to the emitter/collector region on the same surface, and thereafter floating at least the base contact region on one of said surfaces.

5. A method for switching a power semiconductor device having a first and a second p-type emitter/collector region, located respectively on first and second opposite surfaces of an n-type semiconductor die, and a first and a second n-type base contact region, located respectively on the first and second surfaces of the semiconductor die, comprising:

in the ON state, driving base current through one, but not both, of the first and second n-type base contact regions to thereby allow passage of current between the first and second p-type emitter/collector regions through the semiconductor die;

wherein, on each surface, the base contact region and the emitter/collector region are laterally separated by a vertically extended conductive field plate, which field plate is completely insulated from any adjacent semiconductor material by a dielectric material, and is connected to the emitter/collector region on the same surface through a common electrode; and

in the OFF state, not driving base current through any of the first and second n-type base contact regions; whereby peak electric field near a junction between the n-type semiconductor die and one of the first and second p-type emitter/collector regions is reduced by capacitive coupling between the corresponding insulated field plate and the volume of the n-type die, and a breakdown voltage of the semiconductor device is thereby increased.

6. The method of claim 5 , further comprising, at turn-on, shorting the more negative one of the p-type emitter/collector regions together with the base contact region on the same one of the surfaces, to thereby conduct current with a diode voltage drop determined by the junction between that p-type emitter/collector region and the n-type semiconductor die.

7. The method of claim 5 , wherein said step of driving base current drives base current through the base contact region which is nearer the more negative one of the emitter/collector regions, without flowing base current through the other of the base contact regions.

8. The method of claim 5 , further comprising, during transition to the OFF state, temporarily shorting the base contact region on one of said surfaces to the emitter/collector region on the same surface, while also shorting the base contact region on the other of said surfaces to the emitter/collector region on the same surface, and thereafter floating at least the base contact region on one of said surfaces.

Continuity (3)
Continuation 15486921 · Apr 13, 2017
Continuation PCTUS2015055388 · Oct 13, 2015
Provisional Application 62063090 · Oct 13, 2014
Cited By (5)
US 12,388,442 US 12,506,475 US 12,506,476 US 12,665,593 US 12,738,935