IP Library › Granted Patent US 10,615,818
Granted Patent B1
US 10,615,818 · App. 16/429,053 · Granted Apr 7, 2020

Mixed chopping and correlated double sampling two-step analog-to-digital converter

Inventors: Kamlesh Singh (Noida, IN); Vikram Varma (Uttar Pradesh, IN)
Assignee: NXP USA, Inc.
H03M3/34H03M3/342H03M3/46H03M3/496
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Quick Facts
Patent No.
US 10,615,818
App. No.
16/429,053
Granted
Apr 7, 2020
Kind
B1
Abstract

A two-step, hybrid analog-to-digital converter (ADC) includes a Delta-Sigma ADC that employs chopping to resolve MSBs, a Nyquist ADC that employs correlated double sampling (CDS) to resolve LSBs, and a combiner that combines the MSBs and the LSBs to generate a digital output signal. The Delta-Sigma ADC has first and second integrators where, after resolving the MSBs, the first integrator is re-configured to function as a reference buffer for the Nyquist ADC and the second integrator is re-configured to function as the Nyquist ADC.

Claims (19)

1. A two-step, hybrid analog-to-digital converter (ADC) for converting an analog input signal into a digital output signal, the hybrid ADC comprising:

a Delta-Sigma ADC that employs chopping to resolve one or more most-significant bits (MSBs) for the analog input signal;

a Nyquist ADC that employs correlated double sampling (CDS) to resolve one or more least-significant bits (LSBs) for the analog input signal; and

a combiner that combines the one or more MSBs and the one or more LSBs to generate the digital output signal.

2. The two-step hybrid ADC of claim 1 , wherein the Delta-Sigma ADC is a second-order Delta-Sigma ADC comprising a first integrator and a second integrator.

3. The two-step hybrid ADC of claim 2 , wherein the chopping is employed in the first integrator.

4. The two-step hybrid ADC of claim 2 , wherein the first integrator comprises CDS switches that are used to re-configure the first integrator to generate a reference voltage for the Nyquist ADC.

5. The two-step hybrid ADC of claim 2 , wherein the first integrator is re-configurable to function as a reference buffer for the Nyquist ADC.

6. The two-step hybrid ADC of claim 5 , wherein the second integrator is re-configurable to function as the Nyquist ADC.

7. The two-step hybrid ADC of claim 1 , wherein the ADC is implemented in a single integrated circuit.

8. A method for converting an analog input signal into a digital output signal, the method comprising:

performing Delta-Sigma ADC processing with chopping to resolve one or more MSBs for the analog input signal;

then performing Nyquist ADC processing using CDS to generate a reference voltage for the Nyquist ADC processing to resolve one or more LSBs for the analog input signal; and

combining the one or more MSBs and the one or more LSBs to generate the digital output signal.

9. The method of claim 8 , wherein the Delta-Sigma ADC processing is second-order Delta-Sigma ADC processing employing a first integrator and a second integrator.

10. The method of claim 9 , wherein the chopping is employed in the first integrator.

11. The method of claim 9 , wherein the first integrator comprises CDS switches that re-configure the first integrator to generate a reference voltage for the Nyquist ADC.

12. The method of claim 9 , wherein the first integrator is re-configured to function as a reference buffer for the Nyquist ADC.

13. The method of claim 12 , wherein the second integrator is re-configured to function as the Nyquist ADC.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 2, 2019
From: SINGH, KAMLESH; VARMA, VIKRAM
To: NXP USA, INC.
Reel/Frame 049340/0918 →
Cited By (4)
US 12,438,551 US 12,549,191 US 12,683,625 US 12,700,871