Light emitting device including porous semiconductor
A device comprising a semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region is disclosed. The device comprises a porous region. The device comprises a first layer disposed between the light emitting layer and the porous region. The device comprises a mask layer disposed between the porous region and the first layer. The device comprises a plurality of openings formed in the mask layer.
1. A device comprising:
a semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region;
a porous region;
a first layer disposed between the light emitting layer and the porous region, the first layer having a bulk lattice constant larger than a bulk lattice constant of material in the porous region;
a mask layer disposed between the porous region and the first layer; and
a plurality of openings formed in the mask layer.
2. The device of claim 1 wherein the porous region is divided into a plurality of regions, each of the plurality of porous regions being aligned with an opening in the mask layer.
3. The device of claim 2 wherein the porous regions are separated by regions of nonporous material having the same composition as the porous regions.
4. The device of claim 1 further comprising:
a first contact electrically connected to the n-type region; and
a second contact electrically connected to the p-type region.
5. The device of claim 1 further comprising a substrate, wherein at least a portion of the substrate is porous.
6. The device of claim 1 , wherein the mask layer comprises SiN, SiO 2 , Ti, or TiW.
7. The device of claim 1 , wherein the mask layer is at least 4 nm thick.
8. The device of claim 1 , wherein the plurality of openings formed in the mask layer are one-dimensional.
9. The device of claim 1 , wherein the plurality of openings formed in the mask layer are two-dimensional.