IP Library › Granted Patent US 10,678,150
Granted Patent B1
US 10,678,150 · App. 16/192,448 · Granted Jun 9, 2020

Dynamic generation of layout adaptive packaging

Inventors: Uwe Hollerbach (Fremont, CA); Thomas L. Laidig (Richmond, CA)
Assignee: Applied Materials, Inc.
G03F7/70991G03F7/70291G03F7/70383G03F7/70508H01L21/0274
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Quick Facts
Patent No.
US 10,678,150
App. No.
16/192,448
Granted
Jun 9, 2020
Kind
B1
Abstract

Aspects of disclosure provide a method for attaching wiring connections to a component using both design and field measured data of the component to produce accurate wiring connections.

Claims (41)

1. A method for processing an apparatus in a maskless lithography system, comprising:

obtaining coordinate data on a component and a connection pattern to the component in a designed state;

placing the component within range of at least one scanning device associated with the maskless lithography system;

scanning the component with the at least one scanning device to develop a second set of coordinate data for the component;

comparing the obtained coordinate data of the component to the second set of coordinate data to determine an offset of the component scanned with the at least one scanning device to the designed state; and

augmenting the connection pattern to the component based, at least in part, upon one of the offset, visual images of the scanning of the component used to develop the second set of coordinate data, and the second set of coordinate data for the component, wherein the method is performed in-situ in the maskless lithography system.

2. The method according to claim 1 , wherein the component is placed upon a substrate.

3. The method according to claim 2 , wherein the substrate is placed upon an indexing table of the maskless lithography system.

4. The method according to claim 1 , wherein the augmenting of the connection pattern is performed by computer analysis.

5. The method according to claim 1 , wherein the comparing the obtained coordinate data to the second set of coordinate data further comprises comparing the offset to a threshold.

6. The method according to claim 5 , further comprising:

when the offset is less than the threshold, setting the offset to zero.

7. The method according to claim 1 , further comprising:

comparing the obtained coordinate data to the second set of coordinate data further comprises comparing the offset to a threshold; and

when the comparing is greater than the threshold, generating a warning to a user that the threshold has been exceeded.

8. The method according to claim 1 , further comprising:

manufacturing the connection pattern based upon data of the augmented connection pattern.

9. A method for processing an apparatus in a maskless microlithography system, comprising:

obtaining position data on a component and an electrical connection pattern to the component for a designed state;

placing the component on a stage of the maskless microlithography system;

placing the stage within range of at least one scanning device of the maskless microlithography system;

scanning the stage including the component with the at least one scanning device to develop a second set of coordinate data for the component and the electrical connection pattern;

comparing the obtained coordinate data of the component to the second set of coordinate data to determine an offset of the component scanned with the at least one scanning device to the designed state; and

augmenting the electrical connection pattern to the component based, at least in part, upon the offset, wherein the method is performed in-situ in the maskless microlithography system.

10. The method according to claim 9 , further comprising:

manufacturing the electrical connection pattern based upon data of the augmented connection pattern.

11. The method according to claim 9 , wherein the component is placed upon a substrate.

12. The method according to claim 9 , wherein the augmenting of the electrical connection pattern is performed by computer analysis.

13. The method according to claim 9 , wherein the comparing the obtained coordinate data to the second set of coordinate data further comprises comparing the offset to a threshold.

14. A method for processing a substrate in a maskless microlithography system, comprising:

obtaining coordinate data in a designed state pertaining to at least one component and at least one wiring connection pattern to the at least one component, wherein at least one the component is at least one of on and in the substrate;

placing the substrate on a stage within the maskless microlithography system;

moving the substrate on the stage to a scanning device of the maskless microlithography system;

scanning the substrate including the at least one component with the scanning device to develop a second set of coordinate data for the at least one component;

comparing the obtained coordinate data of the at least one component of the stage to the second set of coordinate data to determine an offset of the at least one component scanned with the scanning device to the designed state; and

augmenting the at least one wiring connection pattern to the at least one component based, at least in part, upon one of the offset, visual images of the scanning of the at least one component used to develop the second set of coordinate data, and the second set of coordinate data for the at least one component, wherein the method is performed in-situ in the maskless microlithography system.

15. The method according to claim 14 , further comprising:

manufacturing the at least one wiring connection pattern based upon data of the augmented connection pattern.

16. The method according to claim 14 , wherein the augmenting of the at least one wiring connection pattern is performed by computer analysis.

17. The method according to claim 14 , wherein the comparing the obtained coordinate data to the second set of coordinate data further comprises comparing the offset to a threshold.

18. The method according to claim 14 , wherein the at least one component is a semiconductor component.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 4, 2019
From: HOLLERBACH, UWE; LAIDIG, THOMAS L.
To: APPLIED MATERIALS, INC.
Reel/Frame 048797/0167 →
Cited By (1)
US 12,326,667