IP Library Granted Patent US 10,680,607
Granted Patent B2
US 10,680,607 · App. 16/349,681 · Granted Jun 9, 2020

Gate-drive system

Inventor: Takuya Yabumoto (Tokyo, JP)
Assignee: Mitsubishi Electric Corporation
H03K17/691H02M1/08H02M1/12H02M7/515
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Quick Facts
Patent No.
US 10,680,607
App. No.
16/349,681
Granted
Jun 9, 2020
Kind
B2
Abstract

A gate-drive system according to the present invention which transmits a drive signal to a semiconductor switching device, includes: an inverter circuit to supply high-frequency power including a fundamental wave component and plural harmonic components each having different frequencies; a power transmission circuit which is connected to the inverter circuit and transmits the high-frequency power outputted from the inverter circuit; power receiving circuits to individually receive the fundamental wave component and plural harmonic components of the high-frequency power transmitted from the power transmission circuit; and a control circuit to generate the drive signal for the semiconductor switching device on the basis of the plural harmonic components of the high-frequency power received by the power receiving circuits.

Claims (21)

1. A gate-drive system which transmits a drive signal to a semiconductor switching device, comprising:

an inverter circuit to supply high-frequency power including a fundamental wave component and plural harmonic components each having different frequencies;

a power transmission circuit which is connected to the inverter circuit and transmits the high-frequency power outputted from the inverter circuit;

power receiving circuits, each of which is configured to receive one of the fundamental wave component and the plural harmonic components of the high-frequency power transmitted from the power transmission circuit; and

a control circuit to generate the drive signal for the semiconductor switching device on the basis of the plural harmonic components of the high-frequency power received by the power receiving circuits, wherein the control circuit includes a comparator to compare voltages of high-frequency power received by a first power receiving circuit of the power receiving circuits that is configured to receive a first plural harmonic component of the plural harmonic components and a second power receiving circuit of the power receiving circuits that is configured to receive a second plural harmonic component of the plural harmonic components, and wherein the control circuit is configure to generate the drive signal to control turning on or turning off of the semiconductor switching device on the basis of the comparison result by the comparator.

2. The gate-drive system according to claim 1 ,

wherein the inverter circuit supplies the high-frequency power including a drive frequency component of the inverter circuit as the fundamental wave component, the high- frequency power including, when m and n are integers that are equal to or greater than one and that are different from each other, an m-th harmonic component of the drive frequency of the inverter circuit and an n-th harmonic component of the drive frequency of the inverter circuit as the plural harmonic components,

wherein the power receiving circuits include:

a fundamental wave receiving circuit including first power-receiving coil and a first capacitor that are adjusted so as to resonate at the fundamental wave frequency;

an m-th harmonic power receiving circuit including second power-receiving coil and a second capacitor that are adjusted so as to resonate at the m-th harmonic of the drive frequency of the inverter circuit; and

an n-th harmonic power receiving circuit including third power-receiving coil and a third capacitor that are adjusted so as to resonate at the n-th harmonic of the drive frequency of the inverter circuit, and

wherein the comparator compares voltages of high-frequency power received by the m-th harmonic power receiving circuit and the n-th harmonic power receiving circuit.

3. The gate-drive system according to claim 2 , wherein

when the inverter circuits turns on the semiconductor switching device, the inverter circuits controls a duration of time of its output voltage, so as for the m-th harmonic component of the high-frequency power to be zero, the required duration of time being designed in advance, and

when the inverter circuits turns off the semiconductor switching device, the inverter circuits controls a duration of time of its output voltage, so as for the n-th harmonic component of the high-frequency power to be zero, the required duration of time being designed in advance.

4. The gate-drive system according to claim 3 ,

wherein the m-th harmonic power receiving circuit and the n-th harmonic power receiving circuit comprise their respective rectifier circuits, one of output ends of the rectifier circuit of the m-th harmonic power receiving circuit being connected to and having the same electric potential as one of output ends of the rectifier circuit of the n-th harmonic power receiving circuit.

5. The gate-drive system according to claim 4 , further comprising a quick interrupting switch connected to an output end of the rectifier circuit of the n-th harmonic power receiving circuit.

6. The gate-drive system according to claim 2 , further comprising a quick interrupting switch connected to an output end of the comparator.

7. The gate-drive system according to claim 5 , further comprising an overcurrent detection circuit for the semiconductor switching device, whose output is connected to a gate or a base of the quick interrupting switch.

8. The gate-drive system according to claim 6 , further comprising an overcurrent detection circuit for the semiconductor switching device, whose output is connected to a gate or a base of the quick interrupting switch.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 14, 2019
From: YABUMOTO, TAKUYA
To: MITSUBISHI ELECTRIC CORPORATION
Reel/Frame 050433/0398 →
Priority Claims (1)
JP 2016-247872 · Dec 21, 2016 · national
Continuity (1)
Related Publication 20190363711A1 · Nov 28, 2019