IP Library Granted Patent US 10,692,988
Granted Patent B2
US 10,692,988 · App. 16/199,608 · Granted Jun 23, 2020

Semiconductor device having integrated MOS-gated or Schottky diodes

Inventors: Jian Liu (Torrance, CA); Yan Gao (San Diego, CA)
Assignee: Infineon Technologies Austria AG
H01L29/66484H01L29/1095H01L29/47H01L29/66727H01L29/66734H01L29/7806H01L29/7811H01L29/7813
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Quick Facts
Patent No.
US 10,692,988
App. No.
16/199,608
Granted
Jun 23, 2020
Kind
B2
Abstract

A semiconductor device includes a semiconductor substrate and a plurality of transistor cells. Each transistor cell includes: a gate trench structure formed in the semiconductor substrate and circumscribing the transistor cell; a needle-shaped field electrode trench structure formed in the semiconductor substrate and spaced inward from the gate trench structure; a source region of a first conductivity type formed in the semiconductor substrate adjacent the gate trench structure; a body region of a second conductivity type opposite the first conductivity type formed in the semiconductor substrate below the source region; and a drift zone of the first conductivity type formed in the semiconductor substrate below the body region. The semiconductor device further includes a plurality of MOS-gated diodes or Schottky diodes, each diode formed in the semiconductor substrate at an intersection of four adjacent transistor cells. Corresponding methods of manufacture are also described.

Claims (59)

1. A semiconductor device, comprising:

a semiconductor substrate;

a plurality of transistor cells, each transistor cell comprising:

a gate trench structure formed in the semiconductor substrate and circumscribing the transistor cell;

a needle-shaped field electrode trench structure formed in the semiconductor substrate and spaced inward from the gate trench structure;

a source region of a first conductivity type formed in the semiconductor substrate adjacent the gate trench structure;

a body region of a second conductivity type opposite the first conductivity type formed in the semiconductor substrate below the source region; and

a drift zone of the first conductivity type formed in the semiconductor substrate below the body region; and

a plurality of MOS-gated diodes or Schottky diodes, each diode of the plurality of MOS-gated diodes or Schottky diodes formed outside the plurality of transistor cells and in the semiconductor substrate at an intersection of four adjacent transistor cells.

2. The semiconductor device of claim 1 , wherein each MOS-gated diode of the plurality of MOS-gated diodes is formed in the semiconductor substrate at the intersection of four adjacent transistor cells.

3. The semiconductor device of claim 2 , wherein each MOS-gated diode of the plurality of MOS-gated diodes comprises:

an electrode trench formed in the semiconductor substrate and laterally spaced apart from the gate trench structures of the four adjacent transistor cells;

a first region of the second conductivity type formed in the semiconductor substrate adjacent the electrode trench;

a first region of the first conductivity type formed in the first region of the second conductivity type; and

a conductive material electrically connecting the first region of the first conductivity type and the first region of the second conductivity type to an electrode in the electrode trench.

4. The semiconductor device of claim 3 , wherein each MOS-gated diode of the plurality of MOS-gated diodes further comprises a second region of the first conductivity type formed in a recessed section of the first region of the second conductivity type, and wherein the conductive material contacts the first region of the first conductivity type and the second region of the first conductivity type.

5. The semiconductor device of claim 3 , wherein each MOS-gated diode of the plurality of MOS-gated diodes further comprises a contact trench laterally surrounding the electrode trench and laterally spaced apart from the gate trench structures of the four adjacent transistor cells, and wherein the contact trench is filled with the conductive material.

6. The semiconductor device of claim 3 , wherein each MOS-gated diode of the plurality of MOS-gated diodes further comprises a second region of the second conductivity type formed in the first region of the second conductivity type, wherein the second region of the second conductivity type is doped more heavily than the first region of the second conductivity type, and wherein the conductive material contacts the second region of the second conductivity type.

7. The semiconductor device of claim 1 , wherein each Schottky diode of the plurality of Schottky diodes is formed in the semiconductor substrate at the intersection of four adjacent transistor cells.

8. The semiconductor device of claim 7 , wherein each Schottky diode of the plurality of Schottky diodes comprises a metal or metal alloy in contact with a region of the semiconductor substrate of the first conductivity type.

9. The semiconductor device of claim 7 , wherein each Schottky diode of the plurality of Schottky diodes comprises:

an electrode trench formed in the semiconductor substrate and laterally spaced apart from the gate trench structures of the four adjacent transistor cells; and

a metal electrically connecting an electrode in the electrode trench to a region of the semiconductor substrate of the second conductivity type adjacent the electrode trench.

10. The semiconductor device of claim 9 , wherein a section of the region of the semiconductor substrate of the second conductivity type adjacent each electrode trench is recessed below a main surface of the semiconductor substrate, and wherein the metal of each Schottky diode of the plurality of Schottky diodes contacts a region of the semiconductor substrate of the first conductivity type formed above the recessed section of the region of the semiconductor substrate of the second conductivity type.

11. The semiconductor device of claim 9 , wherein a section of the region of the semiconductor substrate of the second conductivity type adjacent each electrode trench is recessed below a main surface of the semiconductor substrate.

12. A method of manufacturing a semiconductor device, the method comprising:

forming a plurality of transistor cells in a semiconductor substrate, each transistor cell comprising:

a gate trench structure formed in the semiconductor substrate and circumscribing the transistor cell;

a needle-shaped field electrode trench structure formed in the semiconductor substrate and spaced inward from the gate trench structure;

a source region of a first conductivity type formed in the semiconductor substrate adjacent the gate trench structure;

a body region of a second conductivity type opposite the first conductivity type formed in the semiconductor substrate below the source region; and

a drift zone of the first conductivity type formed in the semiconductor substrate below the body region; and

forming a plurality of MOS-gated diodes or Schottky diodes outside the plurality of transistor cells, each diode of the plurality of MOS-gated diodes or Schottky diodes formed in the semiconductor substrate at an intersection of four adjacent transistor cells.

13. The method of claim 12 , wherein forming the plurality of MOS-gated diodes or Schottky diodes in the semiconductor substrate comprises:

etching electrode trenches of the plurality of MOS-gated diodes or Schottky diodes into the semiconductor substrate at a same time gate trenches of the plurality of transistor cells are etched into the semiconductor substrate, using a common trench etching process;

forming a first dielectric on sidewalls and a bottom of the gate trenches and of the electrode trenches;

after forming the first dielectric, forming an electrode in the electrode trenches to form electrode trench structures;

forming a first region of the second conductivity type in the semiconductor substrate adjacent each electrode trench;

forming a first region of the first conductivity type in each first region of the second conductivity type; and

forming a conductive material which electrically connects the first region of the first conductivity type and the first region of the second conductivity type to the electrode in each electrode trench.

14. The method of claim 13 , wherein forming the gate trench structures comprises:

forming a second dielectric on the sidewalls and the bottom of the gate trenches, the second dielectric being thicker than the first dielectric; and

after forming the second dielectric, forming an electrode in the gate trenches.

15. The method of claim 13 , wherein the first region of the second conductivity type is formed in the semiconductor substrate adjacent each electrode trench at a same time the body region of the plurality of transistor cells is formed, using a common body implantation process.

16. The method of claim 13 , wherein forming the plurality of MOS-gated diodes or Schottky diodes in the semiconductor substrate further comprises:

forming a second region of the second conductivity type in each first region of the second conductivity type,

wherein the second region of the second conductivity type is doped more heavily than the first region of the second conductivity type,

wherein the conductive material contacts the second region of the second conductivity type.

17. The method of claim 13 , wherein forming the plurality of MOS-gated diodes or Schottky diodes in the semiconductor substrate further comprises:

recessing the electrode trench structures and a section of the first region of the second conductivity type to reduce the thickness of the first region of the second conductivity type along the sidewalls of the electrode trenches.

18. The method of claim 17 , wherein the first region of the first conductivity type is formed in the recessed section of the first region of the second conductivity type.

19. The method of claim 13 , wherein forming the plurality of MOS-gated diodes or Schottky diodes in the semiconductor substrate further comprises:

etching a plurality of contact trenches into the semiconductor substrate, each contact trench laterally surrounding one of the electrode trenches and being laterally spaced apart from the gate trench structures of the four adjacent transistor cells; and

filling the plurality of contact trenches with the conductive material.

20. The method of claim 12 , wherein forming the plurality of MOS-gated diodes or Schottky diodes in the semiconductor substrate comprises:

depositing an electrically conductive material in direct contact with the semiconductor substrate at the intersection of four adjacent transistor cells.

21. The method of claim 12 , wherein forming the plurality of MOS-gated diodes or Schottky diodes in the semiconductor substrate comprises:

etching a plurality of electrode trenches into the semiconductor substrate, each electrode trench being laterally spaced apart from the gate trench structures of the four adjacent transistor cells; and

depositing a metal which electrically connects an electrode in each electrode trench to a region of the semiconductor substrate adjacent the electrode trench.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 21, 2019
From: INFINEON TECHNOLOGIES AMERICAS CORP.
To: INFINEON TECHNOLOGIES AUSTRIA AG
Reel/Frame 048654/0860 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 19, 2018
From: LIU, JIAN; GAO, YAN
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 047819/0204 →
Continuity (1)
Related Publication 20200168719A1 · May 28, 2020