Ad converter and image sensor
In an AD converter, a first DAC circuit performs a first operation in parallel with a second operation performed by a second DAC circuit, and the first DAC circuit performs the second operation in parallel with the first operation performed by the second DAC circuit. In the first operation, electric charge corresponding to an input signal of the first DAC circuit or an input signal of the second DAC circuit is sampled. In the second operation, an AD conversion is sequentially performed on the basis of the electric charge sampled in the first operation. The first DAC circuit and the second DAC circuit alternately perform the first operation and the second operation.
1. An analog to digital (AD) converter comprising:
a first digital to analog converter (DAC) circuit including a plurality of first capacitors of which capacitance values are weighted;
a second DAC circuit including a plurality of second capacitors of which capacitance values are weighted;
a comparison circuit connected to a first output node of the first DAC circuit and a second output node of the second DAC circuit and configured to compare an electric potential of the first output node with an electric potential of the second output node; and
a control circuit configured to control the first DAC circuit and the second DAC circuit in accordance with a result of the comparison acquired by the comparison circuit,
wherein the first DAC circuit and the second DAC circuit are configured to perform a first operation and a second operation, the first DAC circuit performs the first operation in parallel with the second operation performed by the second DAC circuit, the first DAC circuit performs the second operation in parallel with the first operation performed by the second DAC circuit,
the first DAC circuit and the second DAC circuit alternately perform the first operation and the second operation in parallel with each other,
in the first operation of the first DAC circuit, input signal is applied to a first input node of the first DAC circuit, a first reference signal is applied to the first output node, first electric charge is conserved in the plurality of first capacitors on the basis of a difference between an electric potential of the input signal and an electric potential of the first reference signal, the electric potential of the first reference signal applied to the first output node is input to the comparison circuit as a first electric potential,
in the first operation of the second DAC circuit, the input signal is applied to a second input node of the second DAC circuit, the first reference signal is applied to the second output node, second electric charge is conserved in the plurality of second capacitors on the basis of a difference between an electric potential of the input signal and an electric potential of the first reference signal, the electric potential of the first reference signal applied to the second output node is input to the comparison circuit as the first electric potential,
in the second operation of the first DAC circuit, when a second reference signal is applied to the first input node and the first electric charge is conserved in the plurality of first capacitors, signals input to input nodes of the plurality of first capacitors are switched to the second reference signal or a ground level by the control circuit and a second electric potential is generated,
in the second operation of the second DAC circuit, when the second reference signal is applied to the second input node and the second electric charge is conserved in the plurality of second capacitors, signals input to input nodes of the plurality of second capacitors are switched to the second reference signal or the ground level by the control circuit, and a third electric potential is generated, and
the comparison circuit sequentially performs comparison operation of comparing the first electric potential with the second electric potential and comparison operation of comparing the first electric potential with the third electric potential, thereby performing AD conversion.
2. An image sensor comprising:
the AD converter according to claim 1 ;
a plurality of pixels disposed in a matrix pattern; and
a plurality of column circuits, each column circuit included in the plurality of column circuits being disposed for each column of the plurality of pixels,
wherein signals output from the column circuits disposed in odd-numbered columns of the plurality of pixels are input to one of the first DAC circuit and the second DAC circuit, and
wherein signals output from the column circuits disposed in even-numbered columns of the plurality of pixels are input to a DAC circuit other than the DAC circuit to which the signals output from the column circuits disposed in the even-numbered columns are input.
3. An image sensor comprising:
the AD converter according to claim 1 ; and
a plurality of pixels disposed in a matrix pattern,
wherein the plurality of pixels include a plurality of first pixels and a plurality of second pixels,
each first pixel included in the plurality of first pixels includes a color filter of a first color,
each second pixel included in the plurality of second pixels includes a color filter of a second color different from the first color,
the plurality of first pixels and the plurality of second pixels are periodically arranged,
signals output from the first pixels are input to one of the first DAC circuit and the second DAC circuit, and
signals output from the second pixels are input to a DAC circuit other than the DAC circuit to which the signals output from the first pixels are input.