IP Library Granted Patent US 10,735,721
Granted Patent B2
US 10,735,721 · App. 16/387,007 · Granted Aug 4, 2020

Encoder, decoder, encoding method, and decoding method using local illumination compensation

Inventors: Kiyofumi Abe (Osaka, JP); Takahiro Nishi (Nara, JP); Tadamasa Toma (Osaka, JP); Ryuichi Kanoh (Osaka, JP)
Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
H04N19/105H04N19/139H04N19/154H04N19/176H04N19/196H04N19/436H04N19/521
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Quick Facts
Patent No.
US 10,735,721
App. No.
16/387,007
Granted
Aug 4, 2020
Kind
B2
Abstract

An encoder includes circuitry and memory. Using the memory, the circuitry: generates a prediction image to be used to encode a current block to be processed; derives a luminance correction parameter by referring to an image region which is included in an image including the current block and is outside the current block; and corrects the prediction image to be used to encode the current block, using the luminance correction parameter. The luminance correction parameter is used in common between a plurality of blocks included in the image.

Claims (58)

1. An encoder, comprising:

circuitry; and

memory,

wherein, using the memory, the circuitry:

generates a prediction image to encode a current block;

derives a luminance correction parameter by referring to an image region which is located around a current coding tree unit including the plurality of coding units, one of the plurality of coding units being the current block; and

corrects the prediction image using the luminance correction parameter, and

the luminance correction parameter is used in common between the plurality of coding units.

2. The encoder according to claim 1 ,

wherein the image region is a region in a neighboring coding tree unit located above the current coding tree unit.

3. The encoder according to claim 2 ,

wherein, when the neighboring coding tree unit located above the current coding tree unit is a coding tree unit which immediately precedes the current coding tree unit in processing order, the circuitry encodes each of the plurality of blocks without correcting the prediction image.

4. The encoder according to claim 1 ,

wherein the circuitry stores, in the memory, the luminance correction parameter derived for the current block.

5. The encoder according to claim 1 ,

wherein the circuitry:

encodes the image by a pipeline structure including, as two different stages, a correction stage in which the prediction image is corrected using the luminance correction parameter and a reconstruction stage in which a reconstructed image is generated; and

delays input of a reconstructed image of the current block into the correction stage for another block located after the current block in processing order by a period of time from an end of a process in the correction stage for the current block to an end of all processes in M stages for the current block, M being a natural number.

6. The encoder according to claim 5 ,

wherein M is a number obtainable by subtracting 1 from the number of stages from the correction stage to the reconstruction stage including the correction stage and the reconstruction stage.

7. A decoder, comprising:

circuitry; and

memory,

wherein, using the memory, the circuitry:

generates a prediction image to decode a current block;

derives a luminance correction parameter by referring to an image region which is located around a current coding tree unit including the plurality of coding units, one of the plurality of coding units being the current block; and

corrects the prediction image using the luminance correction parameter, and

the luminance correction parameter is used in common between the plurality of coding units.

8. The decoder according to claim 7 ,

wherein the image region is a region in a neighboring coding tree unit located above the current coding tree unit.

9. The decoder according to claim 8 ,

wherein, when the neighboring coding tree unit located above the current coding tree unit is a coding tree unit which immediately precedes the current coding tree unit in processing order, the circuitry decodes each of the plurality of blocks without correcting the prediction image.

10. The decoder according to claim 7 ,

wherein the circuitry stores, in the memory, the luminance correction parameter derived for the current block.

11. The decoder according to claim 7 ,

wherein the circuitry:

decodes the image by a pipeline structure including, as two different stages, a correction stage in which the prediction image is corrected using the luminance correction parameter and a reconstruction stage in which a reconstructed image is generated; and

delays input of a reconstructed image of the current block into the correction stage for another block located after the current block in processing order by a period of time from an end of a process in the correction stage for the current block to an end of all processes in M stages for the current block, M being a natural number.

12. The decoder according to claim 11 ,

wherein M is a number obtainable by subtracting 1 from the number of stages from the correction stage to the reconstruction stage including the correction stage and the reconstruction stage.

13. An encoding method, comprising:

generating a prediction image to encode a current block;

deriving a luminance correction parameter by referring to an image region which is located around a current coding tree unit including the plurality of coding units, one of the plurality of coding units being the current block; and

correcting the prediction image using the luminance correction parameter,

wherein the luminance correction parameter is used in common between the plurality of coding units.

14. The encoding method according to claim 13 , comprising:

when the current block is located at an upper end of a current coding tree unit including the current block, deriving the luminance correction parameter for the current block by referring to the image region which is in a neighboring current coding tree unit located above the current coding tree unit;

when the current block is not located at the upper end of the current coding tree unit, deriving a luminance correction parameter derived for a processed block located around the current block in the image as the luminance correction parameter for the current block; and

correcting the prediction image using the luminance correction parameter for the current block.

15. A decoding method, comprising:

generating a prediction image to decode a current block;

deriving a luminance correction parameter by referring to an image region which is located around a current coding tree unit including the plurality of coding units, one of the plurality of coding units being the current block; and

correcting the prediction image using the luminance correction parameter,

wherein the luminance correction parameter is used in common between the plurality of coding units.

16. The decoding method according to claim 15 , comprising:

when the current block is located at an upper end of a current coding tree unit including the current block, deriving the luminance correction parameter for the current block by referring to the image region which is in a neighboring current coding tree unit located above the current coding tree unit;

when the current block is not located at the upper end of the current coding tree unit, deriving a luminance correction parameter derived for a processed block located around the current block in the image as the luminance correction parameter for the current block; and

correcting the prediction image using the luminance correction parameter for the current block.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 26, 2019
From: ABE, KIYOFUMI; NISHI, TAKAHIRO; TOMA, TADAMASA; KANOH, RYUICHI
To: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
Reel/Frame 050492/0938 →
Continuity (4)
Provisional Application 62661913 · Apr 24, 2018
Provisional Application 62659435 · Apr 18, 2018
Provisional Application 62658866 · Apr 17, 2018
Related Publication 20190320167A1 · Oct 17, 2019
Cited By (4)
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