IP Library Granted Patent US 10,741,521
Granted Patent B2
US 10,741,521 · App. 16/392,388 · Granted Aug 11, 2020

Semiconductor package and method of manufacturing semiconductor package

Inventors: Jae Sik Choi (Cheongju-si, KR); Jin Won Jeong (Seoul, KR); Do Young Kim (Goyang-si, KR); Hye Ji Lee (Sejong-si, KR); Byeung Soo Song (Sejong-si, KR)
Assignee: MagnaChip Semiconductor, Ltd.
H01L24/95H01L23/4985H01L23/49827H01L23/49838H01L23/60H01L24/14H01L24/81
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Quick Facts
Patent No.
US 10,741,521
App. No.
16/392,388
Granted
Aug 11, 2020
Kind
B2
Abstract

A semiconductor package manufacturing method includes preparing a flexible film including input wire patterns and output wire patterns, preparing a semiconductor chip including metal bumps, attaching the semiconductor chip to one side of the flexible film, such that the metal bumps are connected to either one or both of the input wire patterns and the output wire patterns, and attaching a first absorbing and shielding tape to another side of the flexible film, wherein the first absorbing and shielding tape includes an absorption film and a protective insulating film disposed on the absorption film.

Claims (31)

1. A semiconductor package manufacturing method comprising:

preparing a flexible film comprising input wire patterns and output wire patterns;

preparing a semiconductor chip comprising metal bumps;

attaching the semiconductor chip to one side of the flexible film, such that the metal bumps are connected to either one or both of the input wire patterns and the output wire patterns; and

attaching a first absorber and shielding tape to another side of the flexible film,

wherein the first absorber and shielding tape comprises an absorption film and a protective insulating film disposed on the absorption film.

2. The method of claim 1 ,

wherein the first absorber and shielding tape further comprises an adhesive layer disposed between the absorption film and the protective insulating film, and

wherein the protective insulating film contacts each side surface of the adhesive layer and the absorption film.

3. The method of claim 1 , wherein the protective insulating film surrounds an entire surface of the absorption film.

4. The method of claim 1 , wherein the absorption film comprises a metal alloy comprising either one or both of iron (Fe) and nickel (Ni), and the protective insulating film comprises copper (Cu).

5. The method of claim 1 , wherein the protective insulating film comprises a material comprising polyethylene terephthalate (PET).

6. The method of claim 1 , further comprising attaching a second absorber and shielding tape to a top surface of the semiconductor chip.

7. The method of claim 1 , further comprising attaching the semiconductor package to a display panel.

8. A semiconductor package comprising:

a flexible film comprising input wire patterns and output wire patterns;

a semiconductor chip disposed on the flexible film, the semiconductor chip comprising metal bumps connected to either one or both of the input wire patterns and the output wire patterns;

a first absorber and shielding tape disposed on the flexible film; and

a second absorber and shielding tape disposed on the semiconductor chip,

wherein each of the first absorber and shielding tape and the second absorber and shielding tape comprises a corresponding absorption film and a protective insulating film formed on the absorption film.

9. The semiconductor package of claim 8 , wherein each protective insulating film surrounds an entire surface of the corresponding absorption film.

10. The semiconductor package of claim 8 , further comprising an under-fill layer and a metal wire protecting layer, formed between the semiconductor chip and the either one or both of the input wire patterns and the output wire patterns.

11. A semiconductor package comprising:

a flexible film comprising input wire patterns and output wire patterns;

a semiconductor chip disposed on the flexible film, the semiconductor chip comprising metal bumps connected to either one or both of the input wire patterns and the output wire patterns;

an absorber and shielding tape disposed on an upper side of the flexible film,

wherein the absorber and shielding tape comprises an absorption film and a protective insulating film formed on the absorption film.

12. The semiconductor package of claim 11 , further comprising a first adhesive layer formed on the upper side of the flexible film, wherein the absorption film is formed on the first adhesive layer.

13. The semiconductor package of claim 12 , further comprising a second adhesive layer formed on the absorption film, wherein the protective insulating film is formed on the second adhesive layer.

14. The semiconductor package of claim 11 , wherein the absorption film comprises a metal alloy comprising either one or both of iron (Fe) and Nickel (Ni), or an Mn—Zn alloy.

15. The semiconductor package of claim 11 , wherein the protective insulating film comprises a polyethylene terephthalate (PET) film, an aluminum (Al) film, or a copper (Cu) film.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2025
From: MAGNACHIP MIXED-SIGNAL, LTD.
To: MAGNACHIP SEMICONDUCTOR, LTD.
Reel/Frame 071813/0800 →
NUNC PRO TUNC ASSIGNMENT Recorded Mar 14, 2024
From: MAGNACHIP SEMICONDUCTOR, LTD.
To: MAGNACHIP MIXED-SIGNAL, LTD.
Reel/Frame 066878/0875 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 23, 2019
From: CHOI, JAE SIK; JEONG, JIN WON; KIM, DO YOUNG; LEE, HYE JI; SONG, BYEUNG SOO
To: MAGNACHIP SEMICONDUCTOR, LTD.
Reel/Frame 048975/0154 →