IP Library Granted Patent US 10,784,334
Granted Patent B2
US 10,784,334 · App. 16/129,782 · Granted Sep 22, 2020

Method of manufacturing a capacitor

Inventors: Feng-Yi Chang (Tainan, TW); Fu-Che Lee (Taichung, TW)
Assignees: UNITED MICROELECTRONICS CORP.; Fujian Jinhua Integrated Circuit Co., Ltd.
H01L28/88H01L27/1085H01L27/10852H01L28/87
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Quick Facts
Patent No.
US 10,784,334
App. No.
16/129,782
Granted
Sep 22, 2020
Kind
B2
Abstract

The present invention discloses a method of manufacturing a capacitor, which includes the steps of forming a capacitor recess in a sacrificial layer, wherein the sidewall of capacitor recess has a wave profile, forming a bottom electrode layer on the sidewall of capacitor recess, filling up the capacitor recess with a supporting layer, removing the sacrificial layer to forma capacitor pillar made up by the bottom electrode layer and the supporting layer, forming a capacitor dielectric layer on the capacitor pillar, and forming a top electrode layer on the capacitor dielectric layer.

Claims (21)

1. A method of manufacturing a capacitor, comprising:

providing a substrate, wherein a sacrificial layer is provided on said substrate and a material of said sacrificial layer is amorphous silicon;

forming a capacitor recess in said sacrificial layer, wherein a sidewall of said capacitor recess has a wave profile;

forming a bottom electrode layer on said sidewall of said capacitor recess;

after forming said bottom electrode layer, filling up said capacitor recess with a supporting layer;

removing said sacrificial layer to form a capacitor pillar made by said bottom electrode layer and said supporting layer;

forming a capacitor dielectric layer on said capacitor pillar; and

forming a top electrode layer on said capacitor dielectric layer.

2. The method of manufacturing a capacitor of claim 1 , wherein the step of forming said capacitor recess comprises:

etching exposed said sacrificial layer to form a first hole;

forming a protection layer on a surface of said first hole;

etching through said protection layer at bottom of said first hole; and

repeating the above steps until multiple holes successively connecting with each other are formed so as to form said capacitor recess with said wave profile.

3. The method of manufacturing a capacitor of claim 1 , further comprising forming a semiconductor layer on said top electrode layer after said top electrode layer is formed.

4. The method of manufacturing a capacitor of claim 3 , wherein the material of said semiconductor layer is silicon-germanium.

5. The method of manufacturing a capacitor of claim 1 , further comprising filling up the opening of said capacitor recess with a capping layer after said supporting layer is filled.

6. The method of manufacturing a capacitor of claim 5 , wherein the material of said capping layer is silicon nitride.

7. The method of manufacturing a capacitor of claim 1 , wherein the material of said bottom electrode layer is titanium nitride.

8. The method of manufacturing a capacitor of claim 1 , wherein the material of said supporting layer is silicon nitride or tungsten.

9. The method of manufacturing a capacitor of claim 1 , wherein said capacitor dielectric layer is an alternating stack of zirconium oxide layers and aluminum oxide layers.

10. The method of manufacturing a capacitor of claim 1 , wherein the material of said top electrode layer is titanium nitride.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 12, 2018
From: CHANG, FENG-YI; LEE, FU-CHE
To: UNITED MICROELECTRONICS CORP.; FUJIAN JINHUA INTEGRATED CIRCUIT CO., LTD.
Reel/Frame 046859/0043 →
Priority Claims (1)
CN 2017 1 0991684 · Oct 23, 2017 · national
Continuity (1)
Related Publication 20190123135A1 · Apr 25, 2019
Cited By (1)
US 12,356,637