Solid-state imaging element and electronic apparatus
The present disclosure relates to a solid-state imaging element and an electronic apparatus which are capable of utilizing almost all photoelectrically converted charges for signals during high capacitance. A pixel includes a selection transistor that is disposed on a drain side of an amplification transistor and selects a read-out row, the selection transistor selects the read-out row after reset by a reset transistor, and a transfer transistor performs reference potential read-out during high capacitance prior to reference potential read-out during low capacitance. For example, the present disclosure is applicable to a lamination-type solid-state imaging element.
1. A solid-state imaging element, comprising:
a pixel region in which a plurality of pixels are arranged,
wherein each of the plurality of pixels includes:
a photoelectric conversion unit,
a transfer transistor,
a plurality of floating diffusion units that receive charges from the photoelectric conversion unit through the transfer transistor,
a reset transistor that resets the plurality of floating diffusion units,
a separation transistor that performs ON/OFF control of connection of the plurality of floating diffusion units, and
an amplification transistor that outputs a signal corresponding to a potential of each of the plurality of floating diffusion units,
wherein, before reference potential read-out during low capacitance, a gate of the separation transistor is turned on in a state in which a drain side is in a floating state,
wherein the transfer transistor performs reference potential read-out during high capacitance,
wherein, after the reference potential read-out during high capacitance, the gate of the separation transistor is turned off in a state in which the drain side is in a floating state,
wherein the transfer transistor performs reference potential read-out during low capacitance, and
wherein a negative bias of the separation transistor when being turned off is adjusted.
2. A solid-state imaging element, comprising:
a pixel region in which a plurality of pixels are arranged,
wherein each of the plurality of pixels includes:
a photoelectric conversion unit,
a transfer transistor,
a plurality of floating diffusion units that receive charges from the photoelectric conversion unit through the transfer transistor,
a reset transistor that resets the plurality of floating diffusion units,
a separation transistor that performs ON/OFF control of connection of the plurality of floating diffusion units, and
an amplification transistor that outputs a signal corresponding to a potential of each of the plurality of floating diffusion units,
wherein, before reference potential read-out during low capacitance, a gate of the separation transistor is turned on in a state in which a drain side is in a floating state,
wherein the transfer transistor performs reference potential read-out during high capacitance,
wherein, after the reference potential read-out during high capacitance, the gate of the separation transistor is turned off in a state in which the drain side is in a floating state,
wherein the transfer transistor performs reference potential read-out during low capacitance, and
wherein a threshold value of the separation transistor is adjusted.
3. A solid-state imaging element, comprising:
a pixel region in which a plurality of pixels are arranged,
wherein each of the pixels in the plurality of pixels includes:
a photoelectric conversion unit,
a transfer transistor,
a plurality of floating diffusion units that receive charges from the photoelectric conversion unit through the transfer transistor,
a reset transistor that resets the plurality of floating diffusion units,
a separation transistor that performs ON/OFF control of connection of the plurality of floating diffusion units, and
an amplification transistor that outputs a signal corresponding to a potential of each of the plurality of floating diffusion units,
wherein, before reference potential read-out during low capacitance, a gate of the separation transistor is turned on in a state in which a drain side is in a floating state,
wherein the transfer transistor performs reference potential read-out during high capacitance,
wherein, after the reference potential read-out during high capacitance, the gate of the separation transistor is turned off in a state in which the drain side is in a floating state,
wherein the transfer transistor performs reference potential read-out during low capacitance, and
wherein a node that is parasitic in the plurality of floating diffusion units is used, and a potential of the plurality of floating diffusion units when the separation transistor is turned on is lowered.
4. The solid-state imaging element according to claim 1 , further comprising:
a selection transistor that is disposed on a source side of the amplification transistor and selects a read-out row.
5. The solid-state imaging element according to claim 1 , further comprising:
a selection transistor that is disposed on a drain side of the amplification transistor and selects a read-out row.
6. The solid-state imaging element according to claim 1 ,
wherein a power supply on a drain side of the reset transistor has a configuration capable of performing potential control of the plurality of floating diffusion units, and
ON/OFF switching of the amplification transistor is performed by the potential control of the plurality of floating diffusion units.
7. An electronic apparatus comprising:
a solid-state imaging element that includes a pixel region in which a plurality of pixels are arranged,
wherein each of the pixels in the plurality of pixels includes,
a photoelectric conversion unit,
a transfer transistor,
a plurality of floating diffusion units which receive charges from the photoelectric conversion unit through the transfer transistor,
a reset transistor that resets the plurality of floating diffusion units,
a separation transistor that performs ON/OFF control of connection of the plurality of floating diffusion units, and
an amplification transistor that outputs a signal corresponding to a potential of each of the plurality of floating diffusion units,
wherein, before reference potential read-out during low capacitance, a gate of the separation transistor is turned on in a state in which a drain side is in a floating state,
wherein the transfer transistor performs reference potential read-out during high capacitance;
wherein, after the reference potential read-out during high capacitance, the gate of the separation transistor is turned off in a state in which the drain side is in a floating state,
wherein the transfer transistor performs reference potential read-out during low capacitance, and
wherein a negative bias of the separation transistor when being turned off is adjusted;
a signal processing circuit that processes an output signal that is output from the solid-state imaging element; and
an optical system that causes incident light to be incident to the solid-state imaging element.
8. The electronic apparatus according to claim 7 , wherein the solid state imaging element further includes:
a selection transistor that is disposed on a source side of the amplification transistor and selects a read-out row.
9. The electronic apparatus according to claim 7 , wherein the solid state imaging element further includes:
a selection transistor that is disposed on a drain side of the amplification transistor and selects a read-out row.
10. The electronic apparatus according to claim 7 ,
wherein a power supply on a drain side of the reset transistor has a configuration capable of performing potential control of the plurality of floating diffusion units, and
ON/OFF switching of the amplification transistor is performed by the potential control of the plurality of floating diffusion units.
11. The solid-state imaging element according to claim 2 , further comprising:
a selection transistor that is disposed on a source side of the amplification transistor and selects a read-out row.
12. The solid-state imaging element according to claim 2 , further comprising:
a selection transistor that is disposed on a drain side of the amplification transistor and selects a read-out row.
13. The solid-state imaging element according to claim 2 ,
wherein a power supply on a drain side of the reset transistor has a configuration capable of performing potential control of the plurality of floating diffusion units, and
ON/OFF switching of the amplification transistor is performed by the potential control of the plurality of floating diffusion units.
14. The solid-state imaging element according to claim 3 , further comprising:
a selection transistor that is disposed on a source side of the amplification transistor and selects a read-out row.
15. The solid-state imaging element according to claim 3 , further comprising:
a selection transistor that is disposed on a drain side of the amplification transistor and selects a read-out row.
16. The solid-state imaging element according to claim 3 ,
wherein a power supply on a drain side of the reset transistor has a configuration capable of performing potential control of the plurality of floating diffusion units, and
ON/OFF switching of the amplification transistor is performed by the potential control of the plurality of floating diffusion units.
17. An electronic apparatus comprising:
a solid-state imaging element that includes a pixel region in which a plurality of pixels are arranged,
wherein each of the pixels in the plurality of pixels includes,
a photoelectric conversion unit,
a transfer transistor,
a plurality of floating diffusion units which receive charges from the photoelectric conversion unit through the transfer transistor,
a reset transistor that resets the plurality of floating diffusion units,
a separation transistor that performs ON/OFF control of connection of the plurality of floating diffusion units, and
an amplification transistor that outputs a signal corresponding to a potential of each of the plurality of floating diffusion units,
wherein, before reference potential read-out during low capacitance, a gate of the separation transistor is turned on in a state in which a drain side is in a floating state,
wherein the transfer transistor performs reference potential read-out during high capacitance;
wherein, after the reference potential read-out during high capacitance, the gate of the separation transistor is turned off in a state in which the drain side is in a floating state,
wherein the transfer transistor performs reference potential read-out during low capacitance, and
wherein a threshold value of the separation transistor is adjusted;
a signal processing circuit that processes an output signal that is output from the solid-state imaging element; and
an optical system that causes incident light to be incident to the solid-state imaging element.
18. The electronic apparatus according to claim 17 , wherein the solid state imaging element further includes:
a selection transistor that is disposed on a source side of the amplification transistor and selects a read-out row.
19. The electronic apparatus according to claim 17 , wherein the solid state imaging element further includes:
a selection transistor that is disposed on a drain side of the amplification transistor and selects a read-out row.
20. An electronic apparatus comprising:
a solid-state imaging element that includes a pixel region in which a plurality of pixels are arranged,
wherein each of the pixels in the plurality of pixels includes,
a photoelectric conversion unit,
a transfer transistor,
a plurality of floating diffusion units which receive charges from the photoelectric conversion unit through the transfer transistor,
a reset transistor that resets the plurality of floating diffusion units,
a separation transistor that performs ON/OFF control of connection of the plurality of floating diffusion units, and
an amplification transistor that outputs a signal corresponding to a potential of each of the plurality of floating diffusion units,
wherein, before reference potential read-out during low capacitance, a gate of the separation transistor is turned on in a state in which a drain side is in a floating state,
wherein the transfer transistor performs reference potential read-out during high capacitance;
wherein, after the reference potential read-out during high capacitance, the gate of the separation transistor is turned off in a state in which the drain side is in a floating state,
wherein the transfer transistor performs reference potential read-out during low capacitance, and
wherein a node that is parasitic in the plurality of floating diffusion units is used, and a potential of the plurality of floating diffusion units when the separation transistor is turned on is lowered;
a signal processing circuit that processes an output signal that is output from the solid-state imaging element; and
an optical system that causes incident light to be incident to the solid-state imaging element.