Organic light-emitting diode display with external compensation and anode reset
A display may include an array of organic light-emitting diode display pixels having transistors characterized by threshold voltages subject to transistor variations. Compensation circuitry may be used to measure a transistor threshold voltage for a pixel. The threshold voltage may be sampled by controlling the pixel to sample the threshold voltage onto a capacitor at the pixel. The pixel may include at least one semiconducting-oxide transistor, silicon transistors, and a light-emitting diode. The diode may be coupled to a data line that can be used for both data loading and compensation sensing operations. Reset operations may be performed after data programming and before emission to reset the anode voltage for the diode.
1. A display pixel having a refresh rate, comprising:
a light-emitting diode configured to emit light during an emission operation;
a drive transistor coupled in series with the light-emitting diode;
a data loading transistor coupled to the drive transistor, wherein the data loading transistor is used to perform a data loading operation; and
an anode reset transistor coupled to an anode of the light-emitting diode, wherein the anode reset transistor is used to perform anode reset operations at a higher frequency than the refresh rate to reduce flicker.
2. The display pixel of claim 1 , wherein at least some of the anode reset operations reduce low gray level non-uniformity by being performed after the data loading operation and before the emission operation.
3. The display pixel of claim 1 , wherein the frequency at which the anode reset operations are performed is at least two times the refresh rate.
4. The display pixel of claim 1 , wherein the frequency at which the anode reset operations are performed is at least four times the refresh rate.
5. The display pixel of claim 1 , further comprising:
a voltage line directly connected to the anode reset transistor; and
a semiconducting-oxide transistor connected between the voltage line and a gate terminal of the drive transistor.
6. The display pixel of claim 5 , wherein the anode reset transistor is a silicon transistor.
7. The display pixel of claim 5 , wherein the semiconducting-oxide transistor is an n-type transistor, and wherein the anode reset transistor is a p-type transistor.
8. The display pixel of claim 5 , wherein:
the semiconducting-oxide transistor has a gate terminal configured to receive a first scan signal via a first scan line; and
the data loading transistor has a gate terminal configured to receive a second scan signal via a second scan line that is different than the first scan line.
9. The display pixel of claim 8 , wherein
the anode reset transistor has a gate terminal configured to receive a third scan signal via a third scan line that is different than the first and second scan lines.
10. The display pixel of claim 5 , wherein the semiconducting-oxide transistor and the anode reset transistor are never on at the same time.
11. A display pixel having a refresh rate, comprising:
a light-emitting diode;
a drive transistor coupled in series with the light-emitting diode;
a first switching transistor directly connected to the drive transistor;
a second switching transistor directly connected to the drive transistor;
an anode reset transistor coupled to an anode of the light-emitting diode;
a first scan line configured to provide a first scan signal to the first switching transistor;
a second scan line configured to provide a second scan signal to the second switching transistor; and
a third scan line configured to provide a third scan signal to the anode reset transistor, wherein the anode reset transistor is used to reset the anode at a higher frequency than the refresh rate of the display pixel to reduce flicker.
12. The display pixel of claim 11 , wherein the first switching transistor is a semiconducting-oxide transistor.
13. The display pixel of claim 12 , wherein the anode reset transistor is a silicon transistor.
14. The display pixel of claim 13 , wherein the second switching transistor is also a silicon transistor.
15. The display pixel of claim 11 , wherein the first and second scan signals are asserted to perform a data loading operation on the display pixel.
16. The display pixel of claim 11 , wherein the first scan signal is shared between display pixels in adjacent rows.
17. The display pixel of claim 11 , wherein the third scan signal is shared between display pixels in adjacent rows.
18. A method of operating a display, comprising:
loading data into display pixels at a refresh rate, wherein each of the display pixels has a light-emitting diode with an anode; and
reducing flicker by resetting the anode in each of the display pixels at a frequency that is at least two times the refresh rate.
19. The method of claim 18 , further comprising:
reducing low gray level non-uniformity by resetting the anode after loading data and before an emission period.
20. The display of claim 18 , wherein the refresh rate is less than 30 Hz.