IP Library Granted Patent US 10,903,739
Granted Patent B2
US 10,903,739 · App. 16/570,933 · Granted Jan 26, 2021

Capacitor cross coupled 2-phase buck converter

Inventor: Arnaud Toni (San Diego, CA)
Assignee: Chaoyang Semiconductor Jiangyin Technology Co., Ltd.
H02M3/07
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Quick Facts
Patent No.
US 10,903,739
App. No.
16/570,933
Granted
Jan 26, 2021
Kind
B2
Abstract

A buck converter uses flying capacitors and cross coupling. The flying capacitors reduce the voltage stress across the inductors and the devices, and may provide high efficiency at very low duty cycle ratios. In addition to the high efficiency performance, the converters may provide a significant reduction in area, since smaller inductors can be used compared to typical buck converters. An example of realization shows up to 90% efficiency at 0.5V output and 10 A load from a 3.6V input with small flying capacitors, compared to what is typically used in a switched capacitor converter.

Claims (17)

1. A multi-phase buck converter, comprising:

a plurality of power conversion phases, each power conversion phase comprising a high side switch and a low side switch coupled in series between an input voltage and a lower voltage, a flying capacitor coupled between the high side switch and the low side switch, and an inductor having a first end and a second end, with the first end of the inductor and the low side switch and the flying capacitor coupled to a common node, with the second end of the inductor for each of the power conversion phases coupled to each other and a load and an output capacitor in parallel; and

a plurality of cross-coupling switches, each cross coupling switch coupling a node between the high side switch and the flying capacitor of one phase to the common node coupling the first end of the inductor and the low side switch and the flying capacitor of another phase.

2. The multi-phase buck converter of claim 1 , wherein the plurality of power conversion phases consist of two power conversion phases.

3. The multi-phase buck converter of claim 1 , wherein the plurality of power conversion phases consist of four power conversion phases.

4. The multi-phase buck converter of claim 1 , wherein the lower voltage is ground.

5. A method of operating a multi-phase buck converter having a plurality of power conversion phases, each of the power conversion phases having a flying capacitor in series between a high side switch and a low side switch, with an inductor having a first end coupled to a node between the flying capacitor and the low side switch and having a second end coupled to a load in parallel to an output capacitor, the method comprising:

during one time period, coupling the first end of the inductor of one phase with a node between the high side switch and the flying capacitor of another phase; and

during another time period, not coupling the first end of the inductor of one phase with the node between the high side switch and the flying capacitor of the other phase.

6. The method of claim 5 , further comprising, during the other time period, coupling the first end of the inductor of the other phase with a node between the high side switch and the flying capacitor of the first phase.

7. The method of claim 6 , wherein the high side switch of the first phase is closed during the one time period and the high side switch of the other phase is open during the one time period.

8. The method of claim 6 , wherein the high side switch of the other phase is closed during the other time period and the high side switch of the first phase is open during the one time period.

9. The method of claim 6 , further comprising, during yet another time period, not coupling the first end of the inductor of one phase with the node between the high side switch and the flying capacitor of the other phase and not coupling the first end of the inductor of the other phase with the node between the high side switch and the flying capacitor of the one phase.

10. The method of claim 7 , wherein the low side switch of the first phase is open during the one time period and the low side switch of the other phase is closed during the one time period.

11. The method of claim 7 , wherein the low side switch of the other phase is open during the one time period and the low side switch of the first phase is closed during the one time period.

12. The method of claim 9 , wherein the low side switches of the one phase and the other phase are closed during the yet another time period.

13. The method of claim 12 , wherein the high side switches of the one phase and the other phase are open during the yet another time period.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 24, 2023
From: CHAOYANG SEMICONDUCTOR (SHANGHAI) CO., LTD.
To: ENDURA IP HOLDINGS LTD.
Reel/Frame 063424/0226 →
CHANGE OF NAME Recorded Mar 29, 2022
From: CHAOYANG SEMICONDUCTOR JIANGYIN TECHNOLOGY CO., LTD.
To: CHAOYANG SEMICONDUCTOR (SHANGHAI) CO., LTD
Reel/Frame 061088/0212 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2020
From: TONI, ARNAUD
To: ENDURA TECHNOLOGIES (INTERNATIONAL) LIMITED
Reel/Frame 054570/0235 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 31, 2020
From: ENDURA TECHNOLOGIES (INTERNATIONAL) LIMITED
To: CHAOYANG SEMICONDUCTOR JIANGYIN TECHNOLOGY CO., LTD.
Reel/Frame 053640/0558 →
Continuity (2)
Provisional Application 62731659 · Sep 14, 2018
Related Publication 20200091818A1 · Mar 19, 2020
Cited By (2)
US 12,374,987 US 12,712,449