IP Library Granted Patent US 10,910,491
Granted Patent B2
US 10,910,491 · App. 16/550,293 · Granted Feb 2, 2021

Semiconductor device having reduced capacitance between source and drain pads

Inventors: Li-Fan Lin (Taoyuan, TW); Chun-Chieh Yang (Taoyuan, TW); Ying-Chen Liu (Taoyuan, TW)
Assignee: DELTA ELECTRONICS, INC.
H01L29/7787H01L23/3171H01L23/49537H01L23/49541H01L23/49562H01L23/49575H01L23/528H01L23/5226H01L23/5283H01L23/535H01L24/06H01L29/2003H01L29/205H01L29/402H01L29/41758H01L29/4236H01L29/7786H01L24/48H01L29/42376H01L2224/04042H01L2224/05093H01L2224/0603H01L2224/45014H01L2224/48137H01L2224/48247H01L2224/48257H01L2224/49111H01L2924/1033H01L2924/10344H01L2924/13064
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Quick Facts
Patent No.
US 10,910,491
App. No.
16/550,293
Granted
Feb 2, 2021
Kind
B2
Abstract

A semiconductor device includes an active layer having an active region, a source electrode, a drain electrode, a gate electrode, a source metal layer, a drain metal layer, and a source pad. The source metal layer and the drain metal layer are electrically connected to the source electrode and the drain electrode, respectively. An orthogonal projection of the drain metal layer on the active layer each forms a drain metal layer region. The source pad is electrically connected to the source metal layer. An orthogonal projection of the source pad on the active layer forms a source pad region overlapping the drain metal layer. An area of an overlapping region between the source pad region and the drain metal layer region is smaller than or equal to 40% of an area of the drain metal layer region.

Claims (22)

1. A semiconductor device, comprising:

an active layer having an active region;

a source electrode, a drain electrode, and a gate electrode disposed on the active region of the active layer and extending along a first direction;

a source metal layer disposed on the active region and electrically connected to the source electrode;

a drain metal layer disposed on the active region and electrically connected to the drain electrode, wherein the drain metal layer comprises a first branch portion extending along a second direction different from the first direction, and an orthogonal projection of the drain metal layer on the active layer forms a drain metal layer region; and

a source pad disposed on the active region, wherein the source pad is electrically connected to the source metal layer, wherein the source pad comprises a body portion, the body portion has a longest continuously straight section extending along the second direction to form an equal width, and the equal width extends along the first direction to form the longest continuously straight section, and an orthogonal projection of the source pad on the active layer forms a source pad region that overlaps the drain metal layer region, and an area of an overlapping region between the source pad region and the drain metal layer region is smaller than or equal to 40% of an area of the drain metal layer region, and the entire overlapping region is located within an orthogonal projection of the body portion of the source pad on the active layer.

2. The semiconductor device of claim 1 , wherein an orthogonal projection of the source metal layer on the active layer forms a source metal layer region, and the semiconductor device further comprises:

a drain pad disposed on the active region, wherein the drain pad is electrically connected to the drain metal layer, an orthogonal projection of the drain pad on the active layer forms a drain pad region that overlaps the source metal layer region, and an area of an overlapping region between the drain pad region and the source metal layer region is smaller than or equal to 40% of an area of the source metal layer region.

3. The semiconductor device of claim 1 , wherein the source electrode comprises a bottom electrode portion and a top electrode portion, wherein the bottom electrode portion of the source electrode is disposed between the top electrode portion of the source electrode and the active layer.

4. The semiconductor device of claim 1 , wherein the drain electrode comprises a bottom electrode portion and a top electrode portion, wherein the bottom electrode portion of the drain electrode is disposed between the top electrode portion of the drain electrode and the active layer.

5. The semiconductor device of claim 1 , wherein the source metal layer further comprises a second branch portion extending along the first direction.

6. The semiconductor device of claim 1 , wherein the source pad comprises:

a first branch portion extending along the second direction different from the first direction.

7. The semiconductor device of claim 6 , wherein the source metal layer comprises a first branch portion extending along the second direction and a second branch portion extending along the first direction.

8. The semiconductor device of claim 7 , wherein the source pad further comprises a second branch portion extending along the first direction and electrically connected to the second branch portion of the source metal layer.

9. The semiconductor device of claim 1 , wherein the drain metal layer further comprises a second branch portion extending along the first direction.

10. The semiconductor device of claim 1 , wherein the drain pad comprises:

a body portion extending along the first direction; and

a first branch portion extending along the second direction different from the first direction.

11. The semiconductor device of claim 10 , wherein the drain metal layer comprises a second branch portion extending along the first direction.

12. The semiconductor device of claim 11 , wherein the drain pad further comprises a second branch portion extending along the first direction and electrically connected to the second branch portion of the drain metal layer.

13. The semiconductor device of claim 1 , wherein the first direction is substantially perpendicular to the second direction.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 4, 2022
From: DELTA ELECTRONICS, INC.
To: ANCORA SEMICONDUCTORS INC.
Reel/Frame 061652/0848 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 26, 2019
From: LIN, LI-FAN; YANG, CHUN-CHIEH; LIU, YING-CHEN
To: DELTA ELECTRONICS, INC.
Reel/Frame 050159/0616 →
Priority Claims (3)
TW 102132512 A · Sep 10, 2013 · national
TW 103106659 A · Feb 27, 2014 · national
TW 103114340 A · Apr 21, 2014 · national
Continuity (5)
Continuation In Part 15678102 · Aug 15, 2017
Continuation In Part 15297123 · Oct 18, 2016
Continuation 14496471 · Sep 25, 2014
Continuation In Part 14185322 · Feb 20, 2014
Related Publication 20190386128A1 · Dec 19, 2019