IP Library Granted Patent US 10,914,901
Granted Patent B2
US 10,914,901 · App. 15/786,067 · Granted Feb 9, 2021

Lateral mounting of optoelectronic chips on organic substrate

Inventors: Jean Benoit Heroux (Kawasaki, JP); Masao Tokunari (Yokohama, JP)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
G02B6/4206G02B6/422G02B6/4202G02B6/423G02B6/425G02B6/428G02B6/4214G02B6/4219G02B6/4238G02B6/4243G02B6/4245G02B6/4292G02B6/4249
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Quick Facts
Patent No.
US 10,914,901
App. No.
15/786,067
Granted
Feb 9, 2021
Kind
B2
Abstract

A chip packaging structure that includes an optoelectronic (OE) chip mounted on a first surface of a substrate and whose optically active area is directed laterally; and a lens array for the optoelectronic (OE) chip that is mounted on the first surface of the substrate and faces to the optoelectronic (OE) chip, wherein the lens array has inside a reflector reflecting light from a first direction to a second direction, in which the first direction is substantially perpendicular to the second direction.

Claims (19)

1. A chip packaging structure comprising:

an optoelectronic (OE) chip mounted on a first surface of a substrate and whose optically active area is directed laterally;

a first lens array for the optoelectronic (OE) chip that is mounted on the first surface of the substrate and faces to the optoelectronic (OE) chip, wherein a turning structure is encapsulated by material of the first lens array, with the turning structure including a hollow reflector corresponding to a void having a triangular shaped cross-section for reflecting light from a first direction to a second direction substantially perpendicular to the first direction;

a second lens array for an optical fiber for electrical communication with the first lens array, the second lens array including guide pins providing alignment of the first and second lens arrays.

2. The structure of claim 1 , wherein the first direction is lateral and the second direction is upward.

3. The structure of claim 1 , wherein the first direction is downward and the second direction is lateral.

4. The structure of claim 1 , wherein the first lens array comprises a convex side surface facing to the optically active area of the optoelectronic (OE) chip and a planar top surface.

5. The structure of claim 1 , wherein the first lens array comprises a planar side surface facing to the optically active area of the optoelectronic (OE) chip and a convex top surface.

6. The structure of claim 1 , wherein the optoelectronic (OE) chip has the optically active area on the first side of the substrate and an electrode on a second side of the substrate.

7. The structure of claim 1 , further comprising a driver IC (Integrated Circuit) chip for the optoelectronic (OE) chip that is mounted on the first surface of the substrate.

8. A method of chip packaging comprising:

mounting an optoelectronic (OE) chip on a first surface of a substrate having an optically active area is directed laterally;

mounting a first lens array for the optoelectronic (OE) chip that on the first surface of the substrate that faces to the optoelectronic (OE) chip, wherein a turning structure is encapsulated by material of the first lens array, with the turning structure including a hollow reflector corresponding to a void having a triangular shaped cross-section for reflecting light from a first direction to a second direction, in which the first direction is substantially perpendicular to the second direction; and

forming a second lens array for an optical fiber for electrical communication with the first lens array, the second lens array including guide pins providing alignment of the first and second lens arrays.

9. The method of claim 8 , wherein the first direction is lateral and the second direction is upward.

10. The method of claim 8 , wherein the first direction is downward and the second direction is lateral.

11. The method of claim 8 , wherein the first lens array for the optoelectronic (OE) chip comprises a convex side surface facing to the optically active area of the optoelectronic (OE) chip and a planar top surface.

12. The structure of claim 1 , wherein the substrate includes an organic substrate.

13. The structure of claim 1 , wherein the guide pins are monolithic within the second lens array.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 17, 2017
From: HEROUX, JEAN BENOIT; TOKUNARI, MASAO
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 043884/0974 →
Continuity (1)
Related Publication 20190113695A1 · Apr 18, 2019
Cited By (1)
US 12,468,102