IP Library › Granted Patent US 10,930,310
Granted Patent B1
US 10,930,310 · App. 16/781,216 · Granted Feb 23, 2021

Data storage device sorting access commands based on peak current for multiple actuators

Inventors: Hiroshi Uchida (Kanagawa, JP); Hidehiko Numasato (Kanagawa, JP); KeXiu Liu (Foothill Ranch, CA); Shrey Khanna (San Jose, CA)
Assignee: Western Digital Technologies, Inc.
G11B5/5547G06F3/0625G06F3/0659G11B5/5578
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Quick Facts
Patent No.
US 10,930,310
App. No.
16/781,216
Granted
Feb 23, 2021
Kind
B1
Abstract

A data storage device comprising a first actuator configured to actuate a first head over a first disk surface, and a second actuator configured to actuate a second head over a second disk surface. A plurality of access commands are received from a host, and a cost metric is computed for executing a seek to execute each access command of the plurality of access commands, wherein the cost metric is based on an access latency of the seek, a power consumption of the seek, and an estimated combined current draw of the first and second actuators during the seek. The access commands are sorted into an execution order based on the cost metrics computed for the access commands.

Claims (56)

1. A data storage device comprising:

a first disk surface;

a first head;

a first actuator configured to actuate the first head over the first disk surface;

a second disk surface;

a second head;

a second actuator configured to actuate the second head over the second disk surface; and

control circuitry configured to:

receive a plurality of access commands from a host;

compute a cost metric for executing a seek to execute each access command of the plurality of access commands, wherein the cost metric is based on an access latency of the seek, a power consumption of the seek, and an estimated combined current draw of the first and second actuators during the seek; and

sort the access commands into an execution order based on the cost metrics computed for the access commands.

2. The data storage device as recited in claim 1 , wherein the control circuitry is further configured to:

estimate a peak current window for the seek of each access command; and

estimate the combined current draw of both actuators based on an overlap of the peak current windows.

3. The data storage device as recited in claim 2 , wherein the peak current window is estimated based on a length of the seek.

4. The data storage device as recited in claim 2 , wherein the peak current window corresponds to at least one of an acceleration phase of the seek or a deceleration phase of the seek.

5. The data storage device as recited in claim 1 , wherein when the execution order results in a concurrent seek of the first and second actuators, the control circuitry is further configured to modify a seek profile of at least the second actuator.

6. The data storage device as recited in claim 5 , wherein the control circuitry is further configured to modify the seek profile of at least the second actuator by decreasing an acceleration current applied to the second actuator for a clamp interval of an acceleration phase of the seek profile.

7. The data storage device as recited in claim 6 , wherein the control circuitry is further configured to modify the seek profile of at least the second actuator by increasing the acceleration current applied to the second actuator after the clamp interval.

8. The data storage device as recited in claim 5 , wherein the control circuitry is further configured to modify the seek profile of at least the second actuator by delaying an acceleration phase of the seek profile.

9. The data storage device as recited in claim 8 , wherein the control circuitry is further configured to modify the seek profile of at least the second actuator by increasing a constant velocity phase of the seek profile.

10. A data storage device comprising:

a first disk surface;

a first head;

a first actuator configured to actuate the first head over the first disk surface;

a second disk surface;

a second head;

a second actuator configured to actuate the second head over the second disk surface; and

control circuitry configured to:

receive a plurality of access commands from a host;

compute a first cost metric for executing a seek to execute each access command of the plurality of access commands, wherein the first cost metric is based on at least an access latency of the seek;

sort the access commands into a plurality of candidate execution orders based on the first cost metrics computed for the access commands;

compute a second cost metric for executing a seek to execute each access command in each of the candidate execution orders, wherein the second cost metric is based on an at least an estimated combined current draw of the first and second actuators during the seek;

select one of the candidate execution orders based on the second cost metrics; and

execute the access commands based on the selected execution order.

11. The data storage device as recited in claim 10 , wherein at least one of the first cost metric or the second cost metric is further based on a power consumption of the seek.

12. The data storage device as recited in claim 10 , wherein the control circuitry is further configured to:

estimate a peak current window for the seek of each access command; and

estimate the combined peak current of both actuators based on an overlap of the peak current windows.

13. The data storage device as recited in claim 12 , wherein the peak current window is estimated based on a length of the seek.

14. The data storage device as recited in claim 12 , wherein the peak current window corresponds to at least one of an acceleration phase of the seek or a deceleration phase of the seek.

15. The data storage device as recited in claim 10 , wherein when the selected execution order results in a concurrent seek of the first and second actuators, the control circuitry is further configured to modify a seek profile of at least the second actuator.

16. The data storage device as recited in claim 15 , wherein the control circuitry is further configured to modify the seek profile of at least the second actuator by decreasing an acceleration current applied to the second actuator for a clamp interval of an acceleration phase of the seek profile.

17. The data storage device as recited in claim 16 , wherein the control circuitry is further configured to modify the seek profile of at least the second actuator by increasing the acceleration current applied to the second actuator after the clamp interval.

18. The data storage device as recited in claim 15 , wherein the control circuitry is further configured to modify the seek profile of at least the second actuator by delaying an acceleration phase of the seek profile.

19. The data storage device as recited in claim 18 , wherein the control circuitry is further configured to modify the seek profile of at least the second actuator by increasing a constant velocity phase of the seek profile.

20. A data storage device comprising:

a first disk surface;

a first head;

a first actuator configured to actuate the first head over the first disk surface;

a second disk surface;

a second head;

a second actuator configured to actuate the second head over the second disk surface;

a means for receiving a plurality of access commands from a host;

a means for computing a cost metric for executing a seek to execute each access command of the plurality of access commands, wherein the cost metric is based on an access latency of the seek, a power consumption of the seek, and an estimated combined current draw of the first and second actuators during the seek; and

a means for sorting the access commands into an execution order based on the cost metrics computed for the access commands.

Assignments (5)
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 053482 FRAME 0453 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058966/0279 →
SECURITY INTEREST Recorded May 14, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 053482/0453 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2020
From: UCHIDA, HIROSHI; NUMASATO, HIDEHIKO; LIU, KEXIU; KHANNA, SHREY
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 051712/0444 →
Cited By (3)
US 12,223,982 US 12,271,631 US 12,738,296