IP Library Granted Patent US 10,964,749
Granted Patent B2
US 10,964,749 · App. 16/666,978 · Granted Mar 30, 2021

GaN-based threshold switching device and memory diode

Inventors: Kai Fu (Tempe, AZ); Houqiang Fu (Tempe, AZ); Yuji Zhao (Chandler, AZ)
Assignee: Arizona Board of Regents on behalf of Arizona State University
H01L27/2427G11C13/0002H01L29/2003H01L29/66204H01L29/861H01L45/12H01L45/1608
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Quick Facts
Patent No.
US 10,964,749
App. No.
16/666,978
Granted
Mar 30, 2021
Kind
B2
Abstract

A switching device including a GaN substrate; an unintentionally doped GaN layer on a first surface of the GaN substrate; a regrown unintentionally doped GaN layer on the unintentionally doped GaN layer; a regrowth interface between the unintentionally doped GaN layer and the regrown unintentionally doped GaN layer; a p-GaN layer on the regrown unintentionally doped GaN layer; a first electrode on the p-GaN layer; and a second electrode on a second surface of the GaN substrate.

Claims (17)

1. A switching device comprising:

a GaN substrate;

an unintentionally doped GaN layer on a first surface of the GaN substrate;

a regrown unintentionally doped GaN layer on the unintentionally doped GaN layer;

a regrowth interface between the unintentionally doped GaN layer and the regrown unintentionally doped GaN layer;

a p-GaN layer on the regrown unintentionally doped GaN layer;

a first electrode on the p-GaN layer; and

a second electrode on a second surface of the GaN substrate.

2. The device of claim 1 , further comprising a n + -GaN layer on the unintentionally doped GaN layer.

3. The device of claim 2 , wherein the regrown unintentionally doped GaN layer is in direct contact with the n + -GaN layer and the unintentionally doped GaN layer.

4. The device of claim 3 , wherein a portion of the p-GaN layer is formed over the n + -GaN layer.

5. The device of claim 2 , further comprising a third electrode on the n + -GaN layer.

6. The device of claim 5 , wherein the first electrode and the third electrode form a lateral p-n junction.

7. The device of claim 2 , wherein the first electrode and the third electrode form a vertical p-n junction.

8. The device of claim 2 , wherein the regrowth interface comprises silicon atoms.

9. The device of claim 8 , wherein the device is configured to possess, during operation, a low resistive state facilitated by an electrically conducting path formed by the silicon atoms when a forward bias voltage is applied between the first electrode and the second electrode.

10. The device of claim 1 , wherein the device is configured to possess, during operation, a high resistive state facilitated by an insulating layer formed at the regrowth interface after a soft breakdown.

Assignments (2)
CONFIRMATORY LICENSE Recorded Nov 12, 2019
From: ARIZONA STATE UNIVERSITY-TEMPLE CAMPUS
To: U.S. DEPARTMENT OF ENERGY
Reel/Frame 050989/0254 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 4, 2019
From: FU, KAI; FU, HOUQIANG; ZHAO, YUJI
To: ARIZONA BOARD OF REGENTS ON BEHALF OF ARIZONA STATE UNIVERSITY
Reel/Frame 050905/0824 →
Continuity (2)
Provisional Application 62754258 · Nov 1, 2018
Related Publication 20200144328A1 · May 7, 2020