IP Library › Granted Patent US 10,985,524
Granted Patent B1
US 10,985,524 · App. 16/527,127 · Granted Apr 20, 2021

High-power hybrid silicon-photonics laser

Inventors: Igal I. Bayn (Sunnyvale, CA); Andrew J. Sutton (Sunnyvale, CA); Alexander Shpunt (Portola Valley, CA); Yuval Gerson (Sunnyvale, CA)
Assignee: APPLE INC.
H01S5/0218G02F1/025H01S5/021H01S5/02228H01S5/02461H01S5/042H01S5/34306G02F2001/0152G02F2001/0156G02F2201/063G02F2201/346G02F2202/102H01S5/125H01S5/14
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Quick Facts
Patent No.
US 10,985,524
App. No.
16/527,127
Granted
Apr 20, 2021
Kind
B1
Abstract

An optoelectronic device includes a silicon substrate, with a silicon waveguide layer disposed over the silicon substrate and including an optical waveguide. One or more through-silicon vias (TSVs) extend through the silicon substrate and contact the silicon waveguide layer. A III-V base layer is disposed over the silicon waveguide layer, and an optical amplifier is disposed on the III-V base layer and optically coupled to the optical waveguide.

Claims (29)

1. An optoelectronic device, comprising:

a silicon substrate;

a silicon waveguide layer disposed over the silicon substrate and comprising an optical waveguide;

one or more through-silicon vias (TSVs), extending through the silicon substrate and contacting the silicon waveguide layer;

a III-V base layer disposed over the silicon waveguide layer; and

an optical amplifier disposed on the III-V base layer and optically coupled to the optical waveguide.

2. The device according to claim 1 , wherein the one or more TSVs comprise first and second TSVs, which contact the silicon waveguide layer on opposing first and second sides of the optical waveguide.

3. The device according to claim 2 , and comprising a bias generator, which is coupled to apply a bias voltage between the first and second TSVs.

4. The device according to claim 3 , wherein the silicon waveguide layer comprises a p-doped region in contact with the first TSV and an n-doped region in contact with the second TSV, while the optical waveguide comprises intrinsic silicon, thereby defining a p-i-n diode structure in the silicon waveguide.

5. The device according to claim 4 , wherein the bias generator is configured to reverse-bias the p-i-n diode structure, thereby sweeping free carriers out of the optical waveguide.

6. The device according to claim 3 , wherein the bias generator is configured to modulate the bias voltage so as to control at least one operating parameter of the device, selected from a group of operating parameters consisting of a coefficient of absorption and an effective index of refraction of the optical waveguide.

7. The device according to claim 1 , wherein the optical waveguide comprises a ridge on the silicon waveguide layer in proximity to the optical amplifier.

8. The device according to claim 1 , wherein the optical waveguide comprises a double-slit waveguide.

9. The device according to claim 1 , and comprising a dielectric layer between the silicon waveguide layer and the III-V substrate.

10. The device according to claim 9 , and comprising a dielectric encapsulation structure, which encapsulates the optical amplifier and comprises the dielectric layer between the silicon waveguide layer and the III-V substrate.

11. The device according to claim 1 , wherein the III-V base layer and the optical amplifier comprise InP.

12. The device according to claim 1 , wherein the optical amplifier comprises multiple epitaxial layers formed on the III-V base layer.

13. A method for fabricating an optoelectronic device, comprising:

forming an optical waveguide in a silicon waveguide layer disposed on a silicon substrate;

forming one or more through-silicon vias (TSVs) in the silicon substrate so that the one or more TSVs extend through the silicon substrate and contact the silicon waveguide layer;

bonding a III-V base layer to the silicon waveguide layer; and

forming an optical amplifier on the III-V base layer so that the optical amplifier is optically coupled to the optical waveguide.

14. The method according to claim 13 , wherein the one or more TSVs comprise first and second TSVs, which contact the silicon waveguide layer on opposing first and second sides of the optical waveguide.

15. The method according to claim 14 , and comprising coupling a bias generator to apply a bias voltage between the first and second TSVs.

16. The method according to claim 15 , wherein the silicon waveguide layer comprises a p-doped region in contact with the first TSV and an n-doped region in contact with the second TSV, while the optical waveguide comprises intrinsic silicon, thereby defining a p-i-n diode structure in the silicon waveguide.

17. The method according to claim 13 , wherein forming the optical waveguide comprises a forming a ridge on the silicon waveguide layer in proximity to the optical amplifier.

18. The method according to claim 13 , wherein forming the optical waveguide comprises forming slits in the silicon waveguide layer on opposing sides of the optical waveguide.

19. The method according to claim 13 , and comprising encapsulating the optical amplifier in a dielectric layer between the silicon waveguide layer and the III-V substrate.

20. The method according to claim 13 , wherein forming the optical amplifier comprises depositing multiple epitaxial layers on the III-V base layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 31, 2019
From: BAYN, IGAL I.; SUTTON, ANDREW J.; SHPUNT, ALEXANDER; GERSON, YUVAL
To: APPLE INC.
Reel/Frame 049915/0932 →
Continuity (1)
Provisional Application 62724043 · Aug 29, 2018
Cited By (2)
US 12,197,020 US 12,218,479