Residual coding for transform skip mode and block differential pulse-code modulation
A method of video decoding performed in a video decoder is provided. A bit stream including syntax elements is received. The syntax elements correspond to coefficients of a region of a transform skipped block in a coded picture. The syntax elements include a first flag indicating whether an absolute coefficient level of one of the coefficients is greater than 0, and a second flag indicating a parity of the absolute coefficient level of the one of the coefficients. The second flag is decoded based on an equal probability model.
1. A method of video decoding performed in a video decoder, the method comprising:
receiving a bit stream including syntax elements, the syntax elements corresponding to coefficients of a region of a transform skipped block in a coded picture, the syntax elements including:
a first flag indicating whether an absolute coefficient level of one of the coefficients is greater than 0,
a second flag indicating a parity of the absolute coefficient level of the one of the coefficients,
a third flag indicating whether the absolute coefficient level of the one of the coefficients is greater than 2,
a fourth flag indicating sign information of the coefficient level of the one of the coefficients,
a fifth flag indicating whether the absolute coefficient level of the one of the coefficients is greater than 4, and
a sixth flag indicating a difference between the absolute transform coefficient level of the one of the coefficients and 4,
decoding the first flag, the third flag, the fourth flag, the fifth flag, and the sixth flag, wherein
the second flag is not coded, and
the first flag, the third flag, the fourth flag, the fifth flag, and the sixth flag are coded.
2. The method of claim 1 , further comprising;
decoding the first flag and the third flag in a first pass;
decoding the fifth flag in a second pass; and
determining the second flag in a third pass.
3. The method of claim 1 , further comprising:
decoding the first flag, the third flag, and the fourth flag in a first pass;
decoding the fifth flag in a second pass; and
decoding the sixth flag in a third pass.
4. An apparatus for video decoding, comprising:
processing circuitry configured to receive a bit stream including syntax elements, the syntax elements corresponding to coefficients of a region of a transform skipped block in a coded picture, the syntax elements including:
a first flag indicating whether an absolute coefficient level of one of the coefficients is greater than 0,
a second flag indicating a parity of the absolute coefficient level of the one of the coefficients,
a third flag indicating whether the absolute coefficient level of the one of the coefficients is greater than 2,
a fourth flag indicating sign information of the coefficient level of the one of the coefficients,
a fifth flag indicating whether the absolute coefficient level of the one of the coefficients is greater than 4, and
a sixth flag indicating a difference between the absolute transform coefficient level of the one of the coefficients and 4,
the processing circuitry is configured to decode the first flag, the third flag, the fourth flag, the fifth flag, and the sixth flag, wherein
the second flag is not coded, and
the first flag, the third flag, the fourth flag, the fifth flag, and the sixth flag are coded.
5. The apparatus of claim 4 , wherein the processing circuitry is configured to
decode the first flag and the third flag in a first pass;
decode the fifth flag in a second pass; and
determine the second flag in a third pass.
6. The apparatus of claim 4 , wherein the processing circuitry is configured to
decode the first flag, the third flag, and the fourth flag in a first pass;
decode the fifth flag in a second pass; and
decode the sixth flag in a third pass.