Semiconductor device and fabrication method thereof
A semiconductor device includes a semiconductor substrate, a pair of source/drain regions, and a gate stack. The pair of source/drain regions is on the semiconductor substrate. The gate stack is laterally between the source/drain regions and includes a gate dielectric layer over the semiconductor fin, a metal element-containing layer over the gate dielectric layer, and a fill metal layer over the metal element-containing layer. The metal element-containing layer has a dopant, and a concentration of the dopant in an upper portion of the metal element-containing layer is higher than a concentration of the dopant in a bottom portion of the metal element-containing layer.
1. A semiconductor device, comprising:
a semiconductor substrate;
a pair of source/drain regions on the semiconductor substrate; and
a gate stack laterally between the pair of source/drain regions and comprising:
a gate dielectric layer over the semiconductor substrate;
a metal element-containing layer over the gate dielectric layer, wherein the metal element-containing layer includes:
a first portion that is in contact with the gate dielectric layer;
a second portion including a first dopant, the second portion over the first portion; and
a third portion including the first dopant and a second dopant, the third portion over the second portion;
and a concentration of the first dopant in the second and third portions of the metal element-containing layer is higher than a concentration of the first dopant in the first portion of the metal element-containing layer; and
a fill layer over the metal element-containing layer.
2. The semiconductor device of claim 1 , wherein the metal element-containing layer comprises titanium nitride (TiN), tantalum nitride (TaN), or combinations thereof.
3. The semiconductor device of claim 1 , wherein the bottom portion of the metal element-containing layer has a concentration of the first dopant that is less than about 1%.
4. The semiconductor device of claim 1 , wherein the bottom portion of the metal element-containing layer is substantially free of the first dopant.
5. The semiconductor device of claim 1 , wherein the first dopant comprises aluminum.
6. The semiconductor device of claim 1 , wherein the gate stack further comprises an N-work function layer between the metal element-containing layer and the fill layer, and the N-work function layer is free of the first and second dopants.
7. The semiconductor device of claim 1 , wherein the gate stack further comprises a P-work function layer between the metal element-containing layer and the fill layer, and the P-work function layer is free of the first and second dopants.
8. The semiconductor device of claim 1 , wherein the second dopant comprises silicon.
9. The semiconductor device of claim 1 , wherein the bottom portion of the metal element-containing layer is substantially free of the second dopant.
10. A semiconductor device, comprising:
a substrate;
a semiconductor fin extending upwardly from the substrate;
a gate dielectric layer over the semiconductor fin;
a silicon-free cap layer made of a metal nitride over the gate dielectric layer;
a silicon-containing layer over the silicon-free cap layer, wherein the silicon-containing layer is made of the metal nitride doped with silicon;
a work function layer over the silicon-containing layer; and
a tungsten layer over the work function layer.
11. The semiconductor device of claim 10 , further comprising a titanium nitride layer between the silicon-containing layer and the work function layer.
12. The semiconductor device of claim 10 , wherein the metal nitride comprises titanium nitride (TiN), tantalum nitride (TaN), or combinations thereof.
13. The semiconductor device of claim 10 , wherein the silicon-containing layer is doped with aluminum.
14. A semiconductor device, comprising:
a substrate;
a semiconductor fin extending upwardly from the substrate;
a gate dielectric layer over the semiconductor fin;
a metal element-containing layer over the gate dielectric layer and having an upper portion that comprises a silicon dopant and an aluminum dopant and a middle portion that comprises the aluminum dopant and is substantially free of the silicon dopant;
a work function layer over the metal element-containing layer; and
a fill layer over the work function layer.
15. The semiconductor device of claim 14 , wherein the metal element-containing layer has a bottom portion that is substantially free of the silicon dopant.
16. The semiconductor device of claim 14 , wherein the metal element-containing layer has a bottom portion that is substantially free of the aluminum dopant.
17. The semiconductor device of claim 14 , wherein the work function layer is free of the silicon dopant and the aluminum dopant.
18. The semiconductor device of claim 14 , wherein the metal element-containing layer is made of a metal nitride.
19. The semiconductor device of claim 14 , wherein the metal element-containing layer is made of titanium nitride (TiN), tantalum nitride (TaN), or combinations thereof.
20. The semiconductor device of claim 14 , further comprising a titanium nitride layer between the metal element-containing layer and the work function layer.