Channel encoding method and apparatus in wireless communications
This application provides an encoding method and apparatus in wireless communications between a network device and a terminal. The method includes: performing cyclic redundancy check (CRC) encoding on A to-be-encoded information bits based on a CRC polynomial, to obtain a first bit sequence, where the first bit sequence includes L CRC bits and A information bits, L=11; and performing polar encoding on the first bit sequence.
1. An encoding method, comprising:
performing, by a transmit end and based on a cyclic redundancy check (CRC) polynomial, CRC encoding on A to-be-encoded information bits, to obtain a CRC-encoded bit sequence, wherein the CRC-encoded bit sequence comprises L CRC bits and the A to-be-encoded information bits, L and A are positive integers, L=11, and the CRC polynomial is any one of the following polynomials:
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}5+1;
D{circumflex over ( )}11+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}2+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}6+D{circumflex over ( )}4+D{circumflex over ( )}2+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}5+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}7+D{circumflex over ( )}5+D{circumflex over ( )}4+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}8+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}4+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}3+D{circumflex over ( )}2+D+1; or
D{circumflex over ( )}11+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}4+D{circumflex over ( )}3+D{circumflex over ( )}2+D+1; and
performing, by the transmit end, polar encoding on the CRC-encoded bit sequence to obtain a polar-encoded bit sequence;
rate matching and modulating, by the transmit end, the polar-encoded bit sequence to obtain a modulated sequence; and
outputting, by the transmit end, the modulated sequence.
2. The method according to claim 1 , wherein the CRC polynomial is implemented by using a shift register.
3. The method according to claim 1 , wherein the L CRC bits in the CRC-encoded bit sequence are located after the A to-be-encoded information bits.
4. The method according to claim 1 , wherein the method further comprises:
sending, by the transmit end, the polar-encoded bit sequence.
5. The method according to claim 1 , wherein the transmit end is a base station or a terminal.
6. An encoding apparatus, comprising a processor, wherein the processor is configured to:
perform, based on a cyclic redundancy check (CRC) polynomial, CRC encoding on A to-be-encoded information bits, to obtain a CRC-encoded bit sequence, wherein the CRC-encoded bit sequence comprises L CRC bits and the A to-be-encoded information bits, L and A are positive integers, L=11, and the CRC polynomial is any one of the following polynomials:
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}5+1;
D{circumflex over ( )}11+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}2+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}6+D{circumflex over ( )}4+D{circumflex over ( )}2+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}5+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}7+D{circumflex over ( )}5+D{circumflex over ( )}4+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}8+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}4+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}3+D{circumflex over ( )}2+D+1; or
D{circumflex over ( )}11+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}4+D{circumflex over ( )}3+D{circumflex over ( )}2+D+1; and
perform polar encoding on the CRC-encoded bit sequence to obtain a polar-encoded bit sequence;
perform rate matching and modulating on the polar-encoded bit sequence to obtain a modulated sequence; and
output the modulated sequence.
7. The apparatus according to claim 6 , wherein the encoding apparatus further comprises a memory, and the memory is configured to store a program instruction executed by the processor.
8. The apparatus according to claim 6 , wherein the CRC polynomial is implemented by using a shift register.
9. The apparatus according to claim 6 , wherein the L CRC bits in the CRC-encoded bit sequence are located after the A to-be-encoded information bits.
10. The apparatus according to claim 6 , wherein the apparatus further comprises a transceiver, configured to send the polar-encoded bit sequence.
11. The apparatus according to claim 6 , wherein the apparatus is a base station or a terminal.
12. An encoding apparatus, comprising:
an input interface, configured to obtain A to-be-encoded information bits;
a logic circuit, configured to: perform, based on a cyclic redundancy check (CRC) polynomial, CRC encoding on the A to-be-encoded information bits, to obtain a CRC-encoded bit sequence, wherein the CRC-encoded bit sequence comprises L CRC bits and the A to-be-encoded information bits, L and A are positive integers, L=11, and the CRC polynomial is any one of the following polynomials:
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}5+1;
D{circumflex over ( )}11+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}2+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}6+D{circumflex over ( )}4+D{circumflex over ( )}2+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}5+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}7+D{circumflex over ( )}5+D{circumflex over ( )}4+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}8+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}4+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}3+D{circumflex over ( )}2+D+1; or
D{circumflex over ( )}11+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}4+D{circumflex over ( )}3+D{circumflex over ( )}2+D+1; and
perform polar encoding on the CRC-encoded bit sequence to obtain a polar-encoded bit sequence; and
perform rate matching and modulating on the polar-encoded bit sequence to obtain a modulated sequence; and
an output interface, configured to output the modulated sequence.
13. The apparatus according to claim 12 , wherein the CRC polynomial is implemented by using a shift register.
14. The apparatus according to claim 12 , wherein the L CRC bits in the CRC-encoded bit sequence are located after the A to-be-encoded information bits.
15. The apparatus according to claim 12 , wherein the apparatus is a chip or an integrated circuit.
16. A system, comprising:
at least one processor;
a non-transitory computer-readable storage medium coupled to the at least one processor and storing programming instructions for execution by the at least one processor, wherein the programming instructions instruct the at least one processor to:
obtain A to-be-encoded information bits, that performs, a cyclic redundancy check (CRC) encoding using a CRC polynomial on the A to-be-encoded information bits to obtain a CRC-encoded bit sequence and applies a polar encoding to the CRC-encoded bit sequence, wherein the CRC-encoded bit sequence comprises L CRC bits and the A to-be-encoded information bits, L and A are positive integers, L=11, and the CRC polynomial is any one of the following polynomials:
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}5+1;
D{circumflex over ( )}11+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}2+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}6+D{circumflex over ( )}4+D{circumflex over ( )}2+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}5+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}7+D{circumflex over ( )}5+D{circumflex over ( )}4+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}8+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}4+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}3+D{circumflex over ( )}2+D+1; or
D{circumflex over ( )}11+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}4+D{circumflex over ( )}3+D{circumflex over ( )}2+D+1; and
perform rate matching and modulating on the polar-encoded bit sequence to obtain a modulated sequence; and
a transceiver to transmit the modulated sequence.
17. The system according to claim 16 , wherein the CRC polynomial is implemented by using a shift register.
18. The system according to claim 16 , wherein the L CRC bits in the CRC-encoded bit sequence are located after the A to-be-encoded information bits.
19. A non-transitory computer-readable storage medium, comprising computer instructions, when executed, the computer instructions cause a computer to perform:
obtaining A to-be-encoded information bits;
performing, based on a cyclic redundancy check (CRC) polynomial, CRC encoding on the A to-be-encoded information bits, to obtain a CRC-encoded bit sequence, wherein the CRC-encoded bit sequence comprises L CRC bits and the A to-be-encoded information bits, L and A are positive integers, L=11, and the CRC polynomial is any one of the following polynomials:
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}5+1;
D{circumflex over ( )}11+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}2+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}6+D{circumflex over ( )}4+D{circumflex over ( )}2+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}5+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}7+D{circumflex over ( )}5+D{circumflex over ( )}4+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}8+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}4+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}3+D{circumflex over ( )}2+D+1; or
D{circumflex over ( )}11+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}4+D{circumflex over ( )}3+D{circumflex over ( )}2+D+1; and;
performing polar encoding on the CRC-encoded bit sequence to obtain a polar-encoded bit sequence;
rate matching and modulating the polar-encoded bit sequence to obtain a modulated sequence; and
outputting the modulated sequence.
20. The non-transitory computer-readable storage medium according to claim 19 , wherein the L CRC bits in the CRC-encoded bit sequence are located after the A to-be-encoded information bits.