IP Library Granted Patent US 11,036,617
Granted Patent B2
US 11,036,617 · App. 16/774,607 · Granted Jun 15, 2021

Sequence program processor used for tracing of sequence program

Inventor: Akihiro Matsumoto (Yamanashi, JP)
Assignee: FANUC CORPORATION
G06F11/3636G06F11/323G06F11/3409G06F11/3471
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Quick Facts
Patent No.
US 11,036,617
App. No.
16/774,607
Granted
Jun 15, 2021
Kind
B2
Abstract

A program editor includes a compile unit that analyzes an address of an instruction between a trace start position and a trace end position set in a sequence program by a program editing unit, inserts a transfer instruction about transferring a signal value to a tracing memory, and converts the sequence program to an object code of the sequence program containing a sampling address table in which the analyzed address is set and an execution program. A programmable controller includes: a sampling address setting unit that sets a sampling address in the tracing memory on the basis of the sampling address table in the object code of the sequence program; and a code execution unit that executes the object code of the sequence program and stores the signal value in the tracing memory in accordance with the transfer instruction.

Claims (20)

1. A sequence program processing device that executes an object code of a sequence program stored in a program memory, the sequence program processing device comprising:

a program editor; and

a programmable controller,

the program editor comprising:

a program editing unit capable of setting a pair of a trace start position and a trace end position in the sequence program; and

a compile unit that analyzes an address of an instruction between the trace start position and the trace end position set by the program editing unit, inserts a transfer instruction about transferring a signal value to a tracing memory, and sets the analyzed address in a sampling address table, thereby converting the sequence program to the object code of the sequence program containing an execution program and the sampling address table,

the programmable controller comprising:

a sampling address setting unit that sets a sampling address in the tracing memory based on the sampling address table contained in the object code of the sequence program resulting from the conversion by the compile unit; and

a code execution unit that executes the object code of the sequence program and stores the signal value in the tracing memory in accordance with the transfer instruction.

2. The sequence program processing device according to claim 1 , wherein

the program editing unit sets the pair based on a commanding input for setting and is capable of setting a plurality of the pairs.

3. The sequence program processing device according to claim 1 , wherein

the compile unit inserts the transfer instruction into an interval before a subsequent net.

4. The sequence program processing device according to claim 1 , wherein

the compile unit further inserts a control condition for the transfer instruction.

5. The sequence program processing device according to claim 1 , wherein

the programmable controller comprises:

a graph output unit that outputs a trace result as a trace graph containing the signal value stored in the tracing memory by the code execution unit.

6. The sequence program processing device according to claim 1 , wherein

the programmable controller comprises the program editor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 28, 2020
From: MATSUMOTO, AKIHIRO
To: FANUC CORPORATION
Reel/Frame 051644/0695 →
Priority Claims (1)
JP JP2019-036256 · Feb 28, 2019 · national
Continuity (1)
Related Publication 20200278917A1 · Sep 3, 2020
Cited By (1)
US 12,282,413