IP Library Granted Patent US 11,068,010
Granted Patent B2
US 11,068,010 · App. 16/722,011 · Granted Jul 20, 2021

Current mirror circuit

Inventors: Mark Allan Shill (Tucson, AZ); Binan Wang (Tucson, AZ)
Assignee: TEXAS INSTRUMENTS INCORPORATED
G05F3/262H03M1/785
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Quick Facts
Patent No.
US 11,068,010
App. No.
16/722,011
Granted
Jul 20, 2021
Kind
B2
Abstract

A current mirror circuit includes a current output terminal, a first transistor, a second transistor, and a digital-to-analog converter (DAC). The first transistor includes a first terminal coupled to a power rail, a second terminal coupled to a current source, and a third terminal coupled to the current source. The second transistor includes a first terminal coupled to the power rail, a second terminal coupled to the second terminal of the first transistor, and a third terminal coupled to the current output terminal. The DAC includes an output terminal coupled to the second transistor.

Claims (38)

1. A current mirror circuit, comprising:

a current output terminal;

a first transistor comprising:

a source terminal coupled to a power supply;

a gate terminal coupled to a current source; and

a drain terminal coupled to the gate terminal;

a second transistor comprising:

a source terminal coupled to the power supply;

a gate terminal coupled to the gate terminal of the first transistor; and

a drain terminal coupled to the current output terminal;

a digital-to-analog converter (DAC) comprising:

an output terminal coupled to the gate terminal of the second transistor;

wherein:

the DAC is a first DAC;

the current output terminal is a first current output terminal; and

the current mirror circuit further comprises:

a second current output terminal;

a third transistor comprising:

a first terminal coupled to the power supply;

a second terminal coupled to the second terminal of the first transistor; and

a third terminal coupled to the second current output terminal; and

a second DAC comprising:

an output terminal coupled to the gate terminal of the third transistor.

2. The current mirror circuit of claim 1 , further comprising:

a resistor comprising:

a first terminal coupled to the gate terminal of the first transistor; and

a second terminal coupled to the gate terminal of the second transistor.

3. The current mirror circuit of claim 1 , wherein the first DAC is configured to selectably source or sink current.

4. The current mirror circuit of claim 1 , further comprising:

a resistor comprising:

a first terminal coupled to the power supply; and

a second terminal coupled to the source terminal of the second transistor.

5. The current mirror circuit of claim 1 , further comprising:

an amplifier comprising:

a first input terminal coupled to a voltage source;

a second input terminal coupled to the drain terminal of the first transistor; and

an output terminal coupled to the gate terminal of the first transistor.

6. The current mirror circuit of claim 1 , wherein the first DAC is configured to adjust current output of the second transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 20, 2019
From: SHILL, MARK ALLAN; WANG, BINAN
To: TEXAS INSTRUMENTS INCORPORATED
Reel/Frame 051396/0611 →
Continuity (1)
Related Publication 20210191445A1 · Jun 24, 2021
Cited By (1)
US 12,379,737