Method and apparatus for multi-mode multi-level transmitter
The disclosed systems, structures, and methods are directed to a multi-level multi-mode transmitter, employing a first pre-driver configured to receive M-parallel data streams and to convert the M-parallel data streams into a serial data stream, a first voltage-driver configured to operate on the single data stream and to provide a voltage in accordance with the single data stream, a second pre-driver configured to receive and process the M-parallel data streams in accordance with at least one of the following modes: moderate impedance (Z) post-cursor mode, moderate Z pre-cursor mode, low Z high-swing mode, low Z post-cursor mode, and low Z pre-cursor mode, and convert the processed M-parallel data streams into a first serial stream and a second serial stream and a second voltage-driver configured to operate on the first serial stream and the second serial stream and to provide a voltage.
1. A multi-level multi-mode transmitter, comprising:
a first pre-driver configured to receive M-parallel data streams and to convert the M-parallel data streams into a serial data stream, where M is a positive integer value;
a first voltage-driver configured to operate on the single data stream and to provide a voltage in accordance with the single data stream;
a second pre-driver configured to receive the M-parallel data streams, process the M-parallel data streams in accordance with at least one of the following modes: moderate impedance (Z) post-cursor mode, moderate Z pre-cursor mode, low Z high-swing mode, low Z post-cursor mode, and low Z pre-cursor mode, and convert the processed M-parallel data streams into a first serial stream and a second serial stream; and
a second voltage-driver configured to operate on the first serial stream and the second serial stream and to provide a voltage in accordance with the first serial stream and the second serial stream.
2. The multi-level multi-mode transmitter of claim 1 , wherein the first pre-driver and the first voltage-driver are configured to operate in parallel with the second pre-driver and the second voltage-driver.
3. The multi-level multi-mode transmitter of claim 1 , wherein the first pre-driver comprises a first tap delay configured to delay the M-parallel data streams.
4. The multi-level multi-mode transmitter of claim 3 , wherein the second pre-driver comprises a second tap-delay configured to delay the M-parallel data streams when operating in moderate Z post-cursor mode, and wherein a delay provided by the first tap delay matches to a delay provided by the second tap delay.
5. The multi-level multi-mode transmitter of claim 4 , wherein the second pre-driver further comprises a transition detector configured to detect transitions in delayed M-parallel data streams from low-to-high or from high-to low level and a multiplexer configured to provide first M-parallel streams and second M-parallel streams when operating in moderate Z post-cursor mode.
6. The multi-level multi-mode transmitter of claim 3 , wherein the second pre-driver comprises a second tap-delay configured to delay the M-parallel data streams when operating in moderate Z pre-cursor mode, and wherein a delay provided by the first tap delay is one unit more than a delay provided by the second tap-delay.
7. The multi-level multi-mode transmitter of claim 6 , wherein the second pre-driver further comprises a transition detector configured to detect the transitions in delayed M-parallel data streams from low-to-high or from high-to low level and to provide a M-parallel streams and second M-parallel streams when operating in moderate Z pre-cursor mode.
8. The multi-level multi-mode transmitter of claim 3 , wherein the second pre-driver comprises a second tap-delay configured to delay the M-parallel data streams when operating in low Z post-cursor mode, and wherein a delay provided by the first tap delay is one unit less than a delay provided by the second pre-driver.
9. The multi-level multi-mode transmitter of claim 8 , wherein in low Z post-cursor mode the second pre-driver further comprises an inverter configured to invert the delayed M-parallel data streams and to provide first M-parallel streams and second M-parallel streams when operating in low Z post-cursor mode.
10. The multi-level multi-mode transmitter of claim 3 , wherein the second pre-driver comprises a second tap-delay configured to delay the M-parallel data streams when operating in low Z pre-cursor mode, and wherein a delay provided by the first tap delay is one unit more than a delay provided by the second tap delay.
11. The multi-level multi-mode transmitter of claim 10 , wherein the second pre-driver further comprises an inverter configured to invert the delayed M-parallel data streams and to provide first M-parallel streams and second M-parallel streams when operating in low Z pre-cursor mode.
12. The multi-level multi-mode transmitter of claim 1 , further comprising a selector configured to cause the second pre driver to process the M-parallel data streams in accordance with the at least one of the following modes: moderate impedance (Z) post-cursor mode, moderate Z pre-cursor mode, low Z high-swing mode, low Z post-cursor mode, and low Z pre-cursor mode.
13. A method of multi-level multi-mode transmitter processing, comprising:
receiving M-parallel data streams at a first pre-driver, where M is a positive integer value;
converting, by the first pre-driver, the M-parallel data streams into a serial data stream;
providing, by a first voltage-driver, a voltage in accordance with the serial data stream;
receiving the M-parallel data streams at a second pre-driver;
processing, by second pre-driver, the M-parallel data streams, in accordance with at least one of the following modes: moderate impedance (Z) post-cursor mode, moderate Z pre-cursor mode, low Z high-swing mode, low Z post-cursor mode, and low Z pre-cursor mode,
converting, by the second pre-driver, the processed M-lanes of data stream into a first serial stream and a second serial stream;
providing, by a second voltage-driver, a voltage in accordance with the first serial stream and the second serial stream.
14. The method of claim 13 , further comprising operating the first pre-driver and the first voltage-driver in parallel with the second pre-driver and the second voltage-driver.
15. The method of claim 13 , further comprising delaying the M-parallel data streams by the first pre-driver.
16. The method of claim 15 , further comprising delaying the M-parallel data streams when the second pre-driver is in moderate Z post-cursor mode, wherein a delay provided by the first pre-driver matches to a delay provided by the second pre-driver.
17. The method of claim 16 , further comprising detecting the transitions in delayed M-parallel data streams from low-to-high or from high-to low level and providing first M-parallel streams and second M-parallel streams when the second pre-driver is in moderate Z post-cursor mode.
18. The method of claim 17 , further comprising generating the first serial stream and the second serial stream in accordance with the first M-parallel streams and the second M-parallel streams when the second pre-driver is in moderate Z post-cursor mode.
19. The method of claim 18 , further comprising providing post-cursor data interference compensation when the second pre-driver is in moderate Z post-cursor mode.
20. The method of claim 15 , further comprising delaying the M-parallel data streams when the second pre-driver is in moderate Z pre-cursor mode, wherein a delay provided by the first pre-driver is one unit more than a delay provided by the second pre-driver.
21. The method of claim 20 , further comprising detecting the transitions in delayed M-lanes of data stream from low-to-high or from high-to low level when the second pre-driver is in moderate Z pre-cursor mode and providing first M-parallel streams and second M-parallel streams.
22. The method of claim 21 , further comprising generating the first serial stream and the second serial stream in accordance with the first M-parallel streams and the second M-parallel streams when the second pre-driver is in moderate Z pre-cursor mode.
23. The method of claim 22 , further comprising providing pre-cursor data interference compensation when the second pre-driver is in moderate Z pre-cursor mode.
24. The method of claim 15 , further comprising delaying the M-parallel data streams when the second pre-driver is in low Z post-cursor mode, wherein the delay provided by the first pre-driver is one unit less than the delay provided by the second pre-driver.
25. The method of claim 24 , further comprising inverting the delayed M-parallel data streams and provides first M-parallel streams and second M-parallel streams when the second pre-driver is in low Z post-cursor mode.
26. The method of claim 25 , wherein the first M-parallel streams and the second M-parallel streams are similar when the second pre-driver is in low Z post-cursor mode.
27. The method of claim 25 , further comprising generating the first serial stream and the second serial stream in accordance with the first M-parallel streams and the second M-parallel streams when the second pre-driver is in low Z post-cursor mode.
28. The method of claim 27 , further comprising providing a multi-level output voltage when the second pre-driver is in low Z post-cursor mode, wherein a ratio of a higher voltage level to a lower voltage level of a same polarity is at least equal to four.
29. The method of claim 15 , further comprising delaying the M-parallel streams when the second pre-driver is in low Z pre-cursor mode, wherein a delay provided by the first pre-driver is one unit more than a delay provided by the second pre-driver.
30. The method of claim 29 , further comprising inverting the delayed M-parallel streams and providing first M-parallel streams and second M-parallel streams when the second pre-driver is in low Z pre-cursor mode.
31. The method of claim 30 , further comprising generating the first serial stream and the second serial stream in accordance with the first M-parallel streams and the second M-parallel streams when the second pre-driver is in low Z pre-cursor mode.
32. The method of claim 30 , wherein the first M-lane of stream and the second M-lane of stream are similar when the second pre-driver is in low Z pre-cursor mode.
33. The method of claim 13 , further comprising operating the first pre-driver and the second pre-driver in a similar manner when the second pre-driver is in low Z high-swing mode.
34. The method of claim 13 , further comprising providing a higher voltage swing when the second pre-driver is in low Z high-swing mode.
35. The method of claim 13 , wherein in low Z high-swing mode, low Z post-cursor mode, or low Z pre-cursor mode the overall impedance of the multi-level multi-mode transmitter is reduced.
36. The method of claim 13 , further comprising providing post-cursor data interference compensation when the second pre-driver is in low Z post-cursor mode.
37. The method of claim 13 , further comprising providing a multi-level output voltage, wherein the ratio of a higher voltage level to a lower voltage level of a same polarity is greater than one when the second pre-driver is in moderate Z post-cursor mode or moderate Z pre-cursor mode.
38. The method of claim 13 , further comprising providing pre-cursor data interference compensation when the second pre-driver is in low Z pre-cursor mode.
39. The method of claim 13 , further comprising operating the first voltage driver with same input from the first pre-driver, while operating the second voltage driver with two inputs from the first pre-driver.