IP Library Granted Patent US 11,074,147
Granted Patent B2
US 11,074,147 · App. 16/206,337 · Granted Jul 27, 2021

Continuous mutual extended processor self-test

Inventors: Tobias Ulrich Bergmann (Weinstadt, DE); Oliver Benke (Stuttgart, DE); Thomas Gentner (Boeblingen, DE)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
G06F11/2236G01R31/318533G06F1/3203G06F11/27G06F11/273
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Quick Facts
Patent No.
US 11,074,147
App. No.
16/206,337
Granted
Jul 27, 2021
Kind
B2
Abstract

A method for a continuous mutual extended processor self-test is provided. The method is implemented by a system including a plurality of cores. The system sets an operating condition for the continuous mutual extended processor self-test. An assist processor of the plurality of cores executes a test program that implements the continuous mutual extended processor self-test on a core under test of the plurality of cores. The system determines a pattern and a response during the test program execution and repeats the test program until the test program has finished or failed.

Claims (54)

1. A method for a continuous mutual extended processor self-test by a system comprising a plurality of cores, the method comprising:

determining a power budget to perform the continuous mutual extended processor self-test;

selecting a core of the plurality of cores to be tested based on the power budget;

setting a status of the selected core to CoreUnderTest to provide the core under test;

setting, by the system, an operating condition for the continuous mutual extended processor self-test;

enabling a fence around the core under test that disconnects the core under test from a system bus of the system;

executing, by an assist processor of the plurality of cores, a test program that implements the continuous mutual extended processor self-test on the core under test of the plurality of cores;

determining, by the system, a pattern and a response during the test program execution; and

iteratively repeating, by the system, the test program until the test program has finished or failed, wherein the test program is updated with a new operating condition based on the pattern and response determined during the test program execution.

2. The method of claim 1 , wherein the method further comprises:

extracting test results from the pattern and the response;

utilizing the test results to set the operation condition.

3. The method of claim 2 , wherein repeating the test program comprises:

repeatedly executing by the assist processor the test program in view of the operating conditions being set according to the test results.

4. The method of claim 1 , wherein the method further comprises:

selecting a core of the plurality of cores to be tested as the core under test.

5. The method of claim 1 , wherein the method further comprises:

moving a workload of the core under test to spare core or full core; and

resetting the core under test after the workload is moved.

6. A system comprising a plurality of cores and a memory storing program instructions for a continuous mutual extended processor self-test, the program instructions executable to cause:

determining a power budget to perform the continuous mutual extended processor self-test;

selecting a core of the plurality of cores to be tested based on the power budget;

setting a status of the selected core to CoreUnderTest to provide the core under test;

setting, by the system, an operating condition for the continuous mutual extended processor self-test;

enabling a fence around the core under test that disconnects the core under test from a system bus of the system;

executing, by an assist processor of the plurality of cores, a test program that implements the continuous mutual extended processor self-test on the core under test of the plurality of cores;

determining, by the system, a pattern and a response during the test program execution; and

iteratively repeating, by the system, the test program until the test program has finished or failed, wherein the test program is updated with a new operating condition based on the pattern and response determined during the test program execution.

7. The system of claim 6 , wherein the program instructions are further executable to cause:

extracting test results from the pattern and the response;

utilizing the test results to set the operation condition.

8. The system of claim 7 , wherein repeating the test program comprises:

repeatedly executing by the assist processor the test program in view of the operating conditions being set according to the test results.

9. The system of claim 6 , wherein the program instructions are further executable to cause:

selecting a core of the plurality of cores to be tested as the core under test.

10. The system of claim 6 , wherein the program instructions are further executable to cause:

moving a workload of the core under test to spare core or full core; and

resetting the core under test after the workload is moved.

11. A computer program product for implementing a continuous mutual extended processor self-test, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a system comprising a plurality of cores and a memory to cause:

determining a power budget to perform the continuous mutual extended processor self-test;

selecting a core of the plurality of cores to be tested based on the power budget;

setting a status of the selected core to CoreUnderTest to provide the core under test;

setting, by the system, an operating condition for the continuous mutual extended processor self-test;

enabling a fence around the core under test that disconnects the core under test from a system bus of the system;

executing, by an assist processor of the plurality of cores, a test program that implements the continuous mutual extended processor self-test on the core under test of the plurality of cores;

determining, by the system, a pattern and a response during the test program execution; and

iteratively repeating, by the system, the test program until the test program has finished or failed, wherein the test program is updated with a new operating condition based on the pattern and response determined during the test program execution.

12. The computer program product of claim 11 , wherein the program instructions are further executable by the system to cause:

extracting test results from the pattern and the response;

utilizing the test results to set the operation condition.

13. The computer program product of claim 12 , wherein repeating the test program comprises:

repeatedly executing by the assist processor the test program in view of the operating conditions being set according to the test results.

14. The computer program product of claim 11 , wherein the program instructions are further executable by the system to cause:

selecting a core of the plurality of cores to be tested as the core under test.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 30, 2018
From: BERGMANN, TOBIAS ULRICH; BENKE, OLIVER; GENTNER, THOMAS, DR.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 047643/0915 →
Continuity (1)
Related Publication 20200174901A1 · Jun 4, 2020