Display panel, method for fabricating the same, and display device
This disclosure discloses a display panel, a method for fabricating the same, and a display device. The method includes: forming a pattern of an electrode lead line layer on a substrate; forming connection structures on the pattern of the electrode lead line layer; forming a pattern of an intermediate layer including a light-emitting function layer on the connection structures and the light-emitting areas; forming a pattern of cathodes on the pattern of the intermediate layer; and irradiating the connection structures using laser from a side of the substrate so that the material of the connection structures is melt, and forming through-holes at positions on the intermediate layer corresponding to the connection structures so that the melted material is connected with the cathodes through the through-holes.
1. A method for fabricating a display panel, comprising:
forming a pattern of an electrode lead line layer on a substrate;
forming connection structures on the pattern of the electrode lead line layer, wherein orthographic projections of the connection structures onto the substrate do not overlap with orthographic projections of respective light-emitting areas of the display panel onto the substrate;
forming a pattern of an intermediate layer comprising a light-emitting function layer on the connection structures and the light-emitting areas;
forming a pattern of cathodes on the pattern of the intermediate layer, wherein orthographic projections of the cathodes onto the substrate cover the orthographic projections of the connection structures onto the substrate; and
irradiating the connection structures using laser from a side of the substrate so that the material of the connection structures is melt, and forming through-holes at positions on the intermediate layer corresponding to the connection structures so that the melted material electrically connects the electrode lead line layer with the cathodes through the through-holes.
2. The method according to claim 1 , wherein before forming the pattern of the intermediate layer, the method further comprises:
forming a thermally-insulating layer surrounding the connection structures, on the substrate formed with the connection structures.
3. The method according to claim 2 , wherein an orthographic projection of the thermally-insulating layer onto the substrate does not overlap with the orthographic projections of the connection structures onto the substrate.
4. The method according to claim 3 , wherein the thickness of the thermally-insulating layer in a direction perpendicular to the substrate ranges from 100 to 200 nanometers.
5. The method according to claim 3 , wherein the thickness of the thermally-insulating layer is equal to the thickness of the connection structures in a direction perpendicular to the substrate.
6. The method according to claim 2 , wherein before forming the intermediate layer, the method further comprises:
forming a pattern of a pixels definition layer on the substrate formed with the connection structures.
7. The method according to claim 6 , wherein the pixels definition layer is reused as the thermally-insulating layer.
8. The method according to claim 1 , wherein before forming the cathode layer, the method further comprises:
forming spacers on the substrate formed with the intermediate layer to segment a subsequently formed cathode layer into a plurality of cathode blocks insulated from each other.
9. The method according to claim 2 , wherein forming a pattern of the thermally-insulating layer surrounding the connection structures on the electrode lead line layer comprises:
coating a polymer material on the electrode lead line layer;
patterning the polymer material to form the pattern of the thermally-insulating layer; and
grinding the top of the pattern of the thermally-insulating layer to expose the connection structures.
10. The method according to claim 1 , wherein while the pattern of the electrode lead line layer is being formed, the method further comprises:
forming a pattern of a first electrode layer on the substrate using the same mask.
11. A display panel, comprising:
a substrate, comprising a plurality of light-emitting areas;
an electrode lead line layer, located on the substrate, and comprising a plurality of electrode lead lines;
connection structures, located on a side of the electrode lead line layer away from the substrate, wherein orthographic projections of the connection structures onto the substrate do not overlap with orthographic projections of respective light-emitting areas of the display panel onto the substrate;
an intermediate layer, located on sides of the connection structures away from the substrate, and comprising at least a light-emitting function layer; and
a cathode layer, located on a side of the intermediate layer away from the substrate, wherein orthographic projections of cathodes onto the substrate cover the orthographic projections of the connection structures onto the substrate, and the connection structures run through the intermediate layer; wherein the material of the connection structures is melted under laser irradiation, and through-holes are formed in the intermediate layer, so that the melted material electrically connects the cathodes with corresponding electrode lead lines through the through-holes.
12. The display panel according to claim 11 , wherein the display panel further comprises a thermally-insulating layer surrounding a part of the connection structures, on the electrode lead line layer.
13. The display panel according to claim 12 , wherein an orthographic projection of the thermally-insulating layer onto the substrate does not overlap with the orthographic projections of the connection structures onto the substrate.
14. The display panel according to claim 13 , wherein the thickness of the thermally-insulating layer ranges from 100 to 200 nanometers in a direction perpendicular to the substrate; or
the thickness of the thermally-insulating layer is equal to the thickness of the connection structures in a direction perpendicular to the substrate.
15. The display panel according to claim 12 , wherein the display panel further comprises: a pixels definition layer, wherein the pixels definition layer is located on the sides of the connection structures away from the substrate, and configured to limit a position of the light-emitting function layer.
16. The display panel according to claim 15 , wherein the pixels definition layer is reused as the thermally-insulating layer.
17. The display panel according to claim 11 , wherein the display panel further comprises a first electrode layer arranged at the same layer as the electrode lead line layer.
18. The display panel according to claim 11 , wherein the cathodes are reused as touch electrodes.
19. The display panel according to claim 18 , wherein the display panel further comprises spacers, wherein:
the spacers are located between the intermediate layer and the cathode layer, and orthographic projections of the spacers onto the substrate do not overlap with an orthographic projection of the light-emitting function layer onto the substrate; and
the spacers are configured to segment the cathode layer into a plurality of cathode blocks insulated from each other.
20. A display device, comprising the display panel according to claim 11 .