Battery module system

1. A battery module system comprising:

a plurality of slave modules comprising a first slave module and a second slave module adjacent to the first slave module;

a master module connected in series with the plurality of slave modules, the master module comprising:

a first processor configured to generate a first wake-up signal for waking up the plurality of slave modules and to allocate and manage an identification number of the plurality of slave modules; and

a master terminal connecting the master module and the first slave module connected to the master module,

wherein the first slave module comprises:

an analog front end (AFE) configured to be woken up by receiving the first wake-up signal, to measure at least one physical quantity of the first slave module, and to transmit the measured at least one physical quantity to a second processor;

the second processor configured to receive and process a signal transmitted by the first processor, to transmit a signal to the first processor, and to process a physical quantity measured by the AFE;

a first slave terminal connecting the master module to the first slave module;

a second slave terminal connecting the second slave module to the first slave module;

a first communication isolator arranged on a first communication line connecting the first slave terminal to the AFE, the first communication isolator being configured to transmit the first wake-up signal generated by the first processor to the AFE; and

a second communication isolator arranged on a second communication line connecting the first slave terminal to the second processor, the second communication isolator being configured to transmit a signal generated by the first processor to the second processor or to transmit a signal generated by at least one selected from the second slave module and the second processor to the first processor, and wherein an isolated communication is performed between the master module and the first slave module.

2. The battery module system of claim 1 , wherein the first communication isolator comprises at least one capacitor arranged on the first communication line.

3. The battery module system of claim 1 , wherein the first communication line is configured to transmit a pulse width modulation signal generated by the first processor and received through the first slave terminal to the AFE.

4. The battery module system of claim 1 , wherein the second communication line comprises:

a (2-1)th communication line configured to transmit the signal generated by the first processor to the second processor; and

a (2-2)th communication line configured to transmit the signal generated by at least one selected from the second slave module and the second processor to the first processor.

5. The battery module system of claim 4 , wherein the second communication isolator comprises a high-frequency transformer arranged on the (2-1)th communication line and the (2-2)th communication line.

6. The battery module system of claim 1 , wherein the master terminal and the first slave terminal are electrically connected by a shielded cable comprising at least one shielding layer.

7. The battery module system of claim 1 , wherein the second processor is configured to generate, after receiving the first wake-up signal, a second wake-up signal for waking up the second slave module and to transmit the generated second wake-up signal to the second slave module through the second slave terminal.

8. The battery module system of claim 7 , wherein the first slave module and the second slave module are electrically connected by a shielded cable comprising at least one shielding layer.

9. The battery module system of claim 1 , wherein the master module further comprises a slave module number setter configured to set the number of the plurality of slave modules.

10. The battery module system of claim 9 , wherein the slave module number setter comprises a switch configured to set the number of the plurality of slave modules connected to the master module by at least one bit.