Method of reducing memory effect of power amplifier
A method of reducing memory effect of a power amplifier (PA), for a look-up table (LUT) based memory digital pre-distortion (DPD) circuit of an electronic device is disclosed. The method comprises generating a pre-distorted signal according to a LUT including parameters of an input signal amplitude and an input signal delay associated with a bandwidth of a signal inputted to the memory DPD circuit, and outputting the pre-distorted signal to the PA for improving the nonlinearity of the PA.
1. A method of dynamically adjusting a supply voltage and bias for a power amplifier (PA) of an electronic device by a PA controller of the electronic device, the method comprising:
determining the supply voltage and bias for the PA according to input signal power, peak-to-average power ratio (PAPR), input signal bandwidth, a detecting result of a sensor of the electronic device, an input signal quality, or any combination thereof;
providing the determined supply voltage and bias to a LUT tracking circuit to adaptively model PA nonlinearity by the LUT tracking circuit; and
adjusting the supply voltage and bias by the PA controller.
2. The method of claim 1 , wherein the input signal quality includes at least one of an error vector magnitude (EVM) and an adjacent channel leakage power ratio (ACLR), while the sensor includes a temperature sensor.