IP Library Granted Patent US 11,082,649
Granted Patent B2
US 11,082,649 · App. 16/616,618 · Granted Aug 3, 2021

Solid-state imaging device with pixels having an in-pixel capacitance

Inventors: Masaaki Takizawa (Kanagawa, JP); Yorito Sakano (Kanagawa, JP)
Assignee: Sony Semiconductor Solutions Corporation
H04N5/3591H04N5/379H04N5/3745
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Quick Facts
Patent No.
US 11,082,649
App. No.
16/616,618
Granted
Aug 3, 2021
Kind
B2
Abstract

The present disclosure relates to a solid-state imaging device and an electronic device capable of effectively preventing blooming. Provided is a solid-state imaging device including: a pixel array portion in which a plurality of pixels is two-dimensionally arranged, in which the pixels each include an in-pixel capacitance and a counter electrode of the in-pixel capacitance, the in-pixel capacitance being provided on a side opposite to a light incident surface of a photoelectric conversion element provided in a semiconductor substrate, the counter electrode being provided in the semiconductor substrate. The present disclosure can be applied to, for example, a back-illuminated CMOS image sensor.

Claims (54)

1. A solid-state imaging device comprising:

a pixel array portion in which a plurality of pixels is two-dimensionally arranged,

wherein the pixels each include an in-pixel capacitance and a counter electrode of the in-pixel capacitance, wherein the in-pixel capacitance is provided on a side opposite to a light incident surface of a photoelectric conversion element provided in a semiconductor substrate, wherein the counter electrode is provided in the semiconductor substrate, and wherein an overflow path is provided between the photoelectric conversion element and the in-pixel capacitance in a depth direction in the semiconductor substrate such that the overflow path is adjacent to the counter electrode provided in the semiconductor substrate.

2. The solid-state imaging device according to claim 1 , wherein

a constant voltage is applied to the counter electrode.

3. The solid-state imaging device according to claim 1 , wherein

a variable voltage is applied to the counter electrode.

4. The solid-state imaging device according to claim 3 , wherein

the voltage to be applied to the counter electrode differs between a first period and a third period, and between a second period and the third period, the first period being a period in which a shutter is driven, the second period being a period in which a charge generated by the photoelectric conversion element is read, the third period being a period in which the charge is accumulated.

5. The solid-state imaging device according to claim 1 , wherein

the pixels each further include a charge holding unit that holds a charge generated by the photoelectric conversion element until the charge is read.

6. The solid-state imaging device according to claim 1 , wherein

the overflow path is provided in the semiconductor substrate such that the overflow path is surrounded by the counter electrode.

7. The solid-state imaging device according to claim 1 , wherein

the pixels each include:

a first transfer transistor that transfers a charge generated by the photoelectric conversion element, according to a first drive signal;

a charge-voltage conversion unit that converts charge into voltage;

a reset transistor that resets the charge-voltage conversion unit according to a second drive signal;

an amplifier transistor that amplifies a signal converted by the charge-voltage conversion unit;

a selection transistor that applies the signal from the amplifier transistor to a vertical signal line according to a third drive signal;

a second transfer transistor that couples potentials of the charge-voltage conversion unit and the in-pixel capacitance according to a fourth drive signal; and

a third transfer transistor that is driven according to a fifth drive signal, the third transfer transistor being connected to the second transfer transistor and the charge-voltage conversion unit while being located therebetween.

8. The solid-state imaging device according to claim 7 , wherein

signals for generating a plurality of images on a basis of which a composite image is to be generated are obtained as a result of controlling driving of the transistors by use of the first to fifth drive signals.

9. The solid-state imaging device according to claim 1 , wherein

the solid-state imaging device comprises a back-illuminated complementary metal oxide semiconductor (CMOS) image sensor.

10. A solid-state imaging device comprising:

a pixel array portion in which a plurality of pixels is two-dimensionally arranged,

wherein the pixels each include an in-pixel capacitance and a counter electrode of the in-pixel capacitance, wherein the in-pixel capacitance is provided on a side opposite to a light incident surface of a photoelectric conversion element provided in a semiconductor substrate, wherein the counter electrode is provided in the semiconductor substrate, and wherein an overflow path is directly provided between the photoelectric conversion element and the counter electrode in a depth direction in the semiconductor substrate.

11. The solid-state imaging device according to claim 10 , wherein

the pixels each include:

a first photoelectric conversion element; and

a second photoelectric conversion element different from the first photoelectric conversion element, and

the overflow path is directly provided between one of the photoelectric conversion elements and the counter electrode.

12. The solid-state imaging device according to claim 11 , wherein

the first photoelectric conversion element has a higher sensitivity than the second photoelectric conversion element, and

the overflow path is directly provided between the first photoelectric conversion element and the counter electrode.

13. The solid-state imaging device according to claim 10 , wherein

a constant voltage is applied to the counter electrode.

14. The solid-state imaging device according to claim 10 , wherein

a variable voltage is applied to the counter electrode.

15. The solid-state imaging device according to claim 14 , wherein

the voltage to be applied to the counter electrode differs between a first period and a third period, and between a second period and the third period, the first period being a period in which a shutter is driven, the second period being a period in which a charge generated by the photoelectric conversion element is read, the third period being a period in which the charge is accumulated.

16. The solid-state imaging device according to claim 10 , wherein

the pixels each further include a charge holding unit that holds a charge generated by the photoelectric conversion element until the charge is read.

17. The solid-state imaging device according to claim 10 , wherein the in-pixel capacitance accumulates a charge that has overflowed from the photoelectric conversion element.

18. A solid-state imaging device comprising:

a pixel array portion in which a plurality of pixels is two-dimensionally arranged,

wherein the pixels each include an in-pixel capacitance and a counter electrode of the in-pixel capacitance, wherein the in-pixel capacitance is provided on a side opposite to a light incident surface of a photoelectric conversion element provided in a semiconductor substrate, wherein the counter electrode is provided in the semiconductor substrate, and wherein the in-pixel capacitance accumulates a charge that has overflowed from the photoelectric conversion element.

19. The solid-state imaging device according to claim 18 , wherein

an overflow path is provided between the photoelectric conversion element and the in-pixel capacitance in a depth direction in the semiconductor substrate such that the overflow path is adjacent to the counter electrode provided in the semiconductor substrate.

20. A solid-state imaging device comprising:

a pixel array portion in which a plurality of pixels is two-dimensionally arranged,

wherein the pixels each include an in-pixel capacitance and a counter electrode of the in-pixel capacitance, wherein the in-pixel capacitance is provided on a side opposite to a light incident surface of a photoelectric conversion element provided in a semiconductor substrate, wherein the counter electrode is provided in the semiconductor substrate, and wherein the counter electrode absorbs a charge that has overflowed from the photoelectric conversion element.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 14, 2020
From: TAKIZAWA, MASAAKI; SAKANO, YORITO
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 051826/0687 →
Priority Claims (2)
JP JP2017-110382 · Jun 2, 2017 · national
JP JP2017-179824 · Sep 20, 2017 · national
Continuity (1)
Related Publication 20200186732A1 · Jun 11, 2020
Cited By (2)
US 12,543,393 US 12,713,146