Overvoltage protection and short-circuit withstanding for gallium nitride devices
Disclosed examples include methods, integrated circuits and switch circuits including a driver circuit and a silicon transistor or other current source circuit coupled with a gallium nitride or other high electron mobility first transistor, where the driver operatives in a first mode to deliver a control voltage signal to the first transistor, and in a second mode in response to a detected overvoltage condition associated with the first transistor to control the current source circuit to conduct a sink current from the first transistor to affect a control voltage to at least partially turn on the first transistor.
1. A device, comprising:
a power switch having a first current terminal, a second current terminal, and a control terminal; and
a driver circuit coupled to the control terminal of the power switch, and configured to:
detect an overvoltage condition of the first current terminal;
bias the second current terminal at a first voltage responsive to absence of the overvoltage conditions;
bias the second current terminal at a second voltage responsive to the overvoltage condition, in which the second voltage is lower than the first voltage;
detect an overcurrent condition of the first current terminal; and
bias the second current terminal at a third voltage responsive to the overcurrent condition, in which the third voltage is lower than the second voltage.
2. The device of claim 1 , wherein the power switch includes a gallium nitride (GaN) transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal.
3. The device of claim 1 , wherein the driver circuit is configured to generate a control signal for delivery to the control terminal based on a driver input signal, and the control signal is independent of the overvoltage condition.
4. The device of claim 1 , wherein the driver circuit is configured to generate a control signal for delivery to the control terminal based on a driver input signal, and the control signal is independent of the overvoltage condition and independent of the overcurrent condition.
5. A device comprising:
a power switch having a first current terminal, a second current terminal, and a control terminal;
a driver circuit coupled to the control terminal of the power switch, and configured to:
detect an overvoltage condition of the first current terminal;
bias the second current terminal at a first voltage responsive to absence of the overvoltage condition;
bias the second current terminal at a second voltage responsive to the overvoltage condition, in which the second voltage is lower than the first voltage; and
a transistor having a first current terminal, a second current terminal, and a control terminal, in which:
the first current terminal of the transistor is coupled to the second current terminal of the power switch;
the second current terminal of the transistor is coupled to a ground terminal;
the driver circuit is coupled to the control terminal of the transistor; and
the driver circuit is configured to operate the transistor in: a linear mode responsive to absence of the overvoltage condition; and a saturation mode responsive to the overvoltage condition.
6. The device of claim 5 , wherein:
the power switch includes a first gallium nitride (GaN) transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal; and
the transistor includes a second GaN transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal.
7. The device of claim 6 , wherein the first GaN transistor and the second GaN transistor are arranged in a half-bridge configuration.
8. The device of claim 5 , wherein the transistor is a field effect transistor (FET) having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal.
9. The device of claim 1 , wherein the driver circuit includes an overvoltage sense circuit comprising:
a voltage divider having a first voltage divider terminal coupled to the first current terminal of the power switch, a second voltage divider terminal coupled to a voltage supply terminal, and a third voltage divider terminal between the first and second voltage divider terminals; and
a comparator having a non-inverting input coupled to a reference voltage terminal, an inverting input coupled to the third voltage divider terminal, and an output configured to generate an overvoltage signal responsive to the overvoltage condition.
10. A device, comprising:
a power switch having a first current terminal, a second current terminal, and a control terminal;
a driver circuit coupled to the control terminal of the power switch, and configured to:
detect an overvoltage condition of the first current terminal;
bias the second current terminal to conduct a first current responsive to absence of the overvoltage condition; and
bias the second current terminal to conduct a second current responsive to the overvoltage condition, in which the second current is greater than the first current; and
a transistor having a first current terminal, a second current terminal, and a control terminal, in which:
the first current terminal of the transistor is coupled to the second current terminal of the power switch;
the second current terminal of the transistor is coupled to a ground terminal;
the driver circuit is coupled to the control terminal of the transistor; and
the driver circuit is configured to operate the transistor in: a linear mode responsive to absence of the overvoltage condition; and a saturation mode responsive to the overvoltage condition.
11. The device of claim 10 , wherein the power switch includes a gallium nitride (GaN) transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal.
12. The device of claim 10 , wherein the driver circuit is configured to generate a control signal for delivery to the control terminal based on a driver input signal, and the control signal is independent of the overvoltage condition.
13. The device of claim 10 , wherein:
the power switch includes a first gallium nitride (GaN) transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal; and
the transistor includes a second GaN transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal.
14. The device of claim 10 , wherein the transistor is a FET having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal.
15. A half bridge circuit, comprising:
a first gallium nitride (GaN) switch having a first drain, a first source, and a first gate;
a second GaN switch having a second drain coupled to the first source, a second source, and a second gate; and
a driver circuit coupled to the first and second GaN switches, and configured to:
detect an overvoltage condition of the first drain;
bias the first source at a first voltage responsive to absence of the overvoltage condition; and
bias the first source at a second voltage responsive to the overvoltage condition, in which the second voltage is lower than the first voltage.
16. The device of claim 15 , wherein the driver circuit is configured to generate a control signal for delivery to the first gate based on a driver input signal, and the control signal is independent of the overvoltage condition.
17. The device of claim 15 , wherein the driver circuit is coupled to the second gate, and the driver circuit is configured to operate the second GaN switch in: a linear mode responsive to absence of the overvoltage condition; and a saturation mode responsive to the overvoltage condition.
18. The device of claim 15 , further comprising:
a FET having a third drain coupled to the first source, a third source, and a third gate, in which:
the driver circuit is coupled to the third gate; and
the driver circuit is configured to operate the FET in: a linear mode responsive to absence of the overvoltage condition; and a saturation mode responsive to the overvoltage condition.