System and method for digital pre-distortion circuits
A circuit for signal classification in a digital pre-distortion (DPD) system is provided. The circuit includes a first frequency path with a positive frequency translation to generate a first power level corresponding to a signal output of the first frequency path, a second frequency path with a negative frequency translation to generate a second power level corresponding to a signal output of the second frequency path, and a third frequency path configured to filter the input signal via a high pass filter (HPF) and to generate a third power level corresponding to a signal output of the third frequency path. The circuit further includes a processing unit configured to compute frequency content metrics corresponding to the input signal based on the first power level, the second power level and the third power level for selecting a set of DPD coefficients for the DPD circuit.
1. An apparatus for signal classification in a digital pre-distortion (DPD) circuit, comprising:
a first frequency path configured to filter an input signal via a first half-band low pass filter (LPF) after a positive frequency translation and to generate a first power level corresponding to a signal output of the first frequency path;
a second frequency path configured to filter the input signal via a second half-band LPF after a negative frequency translation and to generate a second power level corresponding to a signal output of the second frequency path;
a third frequency path configured to filter the input signal via a high pass filter (HPF) and to generate a third power level corresponding to a signal output of the third frequency path; and
a processing unit configured to compute frequency content metrics corresponding to the input signal based on the first power level, the second power level and the third power level for selecting a set of DPD coefficients for the DPD circuit.
2. The apparatus of claim 1 , wherein the third frequency path comprises:
a bit shifter that right shifts the input signal by one bit;
the HPF connected to the bit shifter and configured to filter a bit shifter output; and
a down sampler connected to the HPF and configured to down sample a HPF output.
3. The apparatus of claim 2 , wherein the down sampler is connected to a power meter configured to estimate the third power level as an average output signal power from the down sampler.
4. The apparatus of claim 1 , wherein the frequency content metrics include a half-band power ratio that indicates a frequency location of a signal power of the input signal and a bandwidth metric that is indicative of an instantaneous bandwidth of the signal power of the input signal.
5. The apparatus of claim 4 , wherein the processing unit is configured to computing the half-band power ratio based on (the first power level−the second power level)/(the first power level+the second power level).
6. The apparatus of claim 4 , wherein the processing unit is configured to compute the bandwidth metric based on 2×the third power level/(the first power level+the second power level).
7. The apparatus of claim 4 , wherein the half-band power ratio and the bandwidth metric jointly classify a unique carrier configuration when the input signal belongs to a set of symmetric carrier configurations.
8. The apparatus of claim 4 , wherein the processing unit is configured to map a combination of the half-band power ratio, the bandwidth metric and an average power of the input signal to the set of DPD coefficients in a three-dimensional space.
9. The apparatus of claim 8 , wherein the three-dimensional space contains data points representing different sets of DPD coefficients corresponding to different carrier configurations.
10. The apparatus of claim 4 , wherein the processing unit is configured to:
map an average power of the input signal to a pre-defined two-dimensional distribution landscape of DPD coefficients; and
map a combination of the half-band power ratio and the bandwidth metric to the set of DPD coefficients within the pre-defined two-dimensional distribution landscape of DPD coefficients.
11. A method for signal classification in a digital pre-distortion (DPD) circuit, comprising:
receiving an input signal;
filtering the input signal, via a first half-band low pass filter (LPF) after a positive frequency translation at a first frequency path;
generating a first power level corresponding to a signal output of the first frequency path;
filtering the input signal, via a second half-band LPF after a negative frequency translation at a second frequency path;
generating a second power level corresponding to a signal output of the second frequency path;
filtering the input signal, via a high pass filter (HPF) at a third frequency path;
generating a third power level corresponding to a signal output of the third frequency path; and
computing frequency content metrics corresponding to the input signal based on the first power level, the second power level and the third power level for selecting a set of DPD coefficients for the DPD circuit.
12. The method of claim 11 , further comprising: wherein the third frequency path comprises:
right shifting, via a bit shifter at the third frequency path, the input signal by one bit;
filtering a bit shifter output by the HPF connected to the bit shifter; and
down sampling a HPF output via a down sampler connected to the HPF.
13. The method of claim 12 , wherein the down sampler is connected to a power meter configured to estimate the third power level as an average output signal power from the down sampler.
14. The method of claim 11 , wherein the frequency content metrics include a half-band power ratio that indicates a frequency location of the signal power of the input signal and a bandwidth metric that is indicative of an instantaneous bandwidth of the signal power of the input signal.
15. The method of claim 14 , wherein the computing frequency content metrics corresponding to the input signal further comprises computing the half-band power ratio based on (the first power level−the second power level)/(the first power level+the second power level).
16. The method of claim 14 , wherein the computing frequency content metrics corresponding to the input signal further comprises computing the bandwidth metric based on 2×the third power level/(the first power level+the second power level).
17. The method of claim 14 , wherein the half-band power ratio and the bandwidth metric jointly classify a unique carrier configuration when the input signal belongs to a set of symmetric carrier configurations.
18. The method of claim 14 , wherein the selecting the set of DPD coefficients for the DPD circuit further comprises mapping a combination of the half-band power ratio, the bandwidth metric and an average power of the input signal to the set of DPD coefficients in a three-dimensional space.
19. The method of claim 18 , further comprising:
collecting data points within the three-dimensional space representing different sets of DPD coefficients corresponding to different carrier configurations.
20. The method of claim 14 , wherein the selecting the set of DPD coefficients for the DPD circuit further comprises:
mapping an average power of the input signal to a pre-defined two-dimensional distribution landscape of DPD coefficients; and
mapping a combination of the half-band power ratio and the bandwidth metric to the set of DPD coefficients within the pre-defined two-dimensional distribution landscape of DPD coefficients.