General purpose neural processor
View Patent ↗A computer processor includes an on-chip network and a plurality of tiles. Each tile includes an input circuit to receive a voltage signal from the network, and a crossbar array, including at least one neuron. The neuron includes first and second bit lines, a programmable resistor connecting the voltage signal to the first bit line, and a comparator to receive inputs from the two bit lines and to output a voltage, when a bypass condition is not active. Each tile includes a programming circuit to set a resistance value of the resistor, a pass-through circuit to provide the voltage signal to an input circuit of a first additional tile, when a pass-through condition is active, a bypass circuit to provide values of the bit lines to a second additional tile, when the bypass condition is active; and at least one output circuit to provide an output signal to the network.
1. A computer processor comprising:
an on-chip network; and
a plurality of tiles, each tile comprising:
at least one input circuit configured to receive at least one voltage signal provided by the on-chip network;
a crossbar array, comprising:
at least one neuron, comprising:
a first bit line;
a programmable-resistor connecting the voltage signal to the bit line;
a second bit line; and
a comparator configured to receive inputs from the two bit lines and to output a voltage Vout, in the event a bypass condition is not active;
a programming circuit configured to set a resistance value of the programmable resistor;
a pass-through circuit configured to provide the voltage signal to at least one input circuit of a first additional tile in the processor, in the event a pass-through condition is active;
a bypass circuit configured to provide values of the bit lines to a second additional tile in the processor, in the event the bypass condition is active; and
at least one output circuit configured to provide an output signal to the on-chip network.
2. A computer processor in accordance with claim 1 , wherein:
the at least one neuron further comprises a programmable resistor connecting the voltage signal to the second bit line; and
the programming circuit is further configured to set a resistance value of the programmable resistor connecting the voltage signal to the second bit line.
3. A computer processor in accordance with claim 1 , wherein the first additional tile in the processor and the second additional tile in the processor are different tiles.
4. A computer processor in accordance with claim 1 , wherein the first additional tile in the processor and the second additional tile in the processor are the same tile.