IP Library › Granted Patent US 11,151,068
Granted Patent B1
US 11,151,068 · App. 16/934,518 · Granted Oct 19, 2021

Enhanced secure digital (SD) direct command for improved meta-channel communications

Inventor: Kishalay Haldar (Bangalore, IN)
Assignee: QUALCOMM Incorporated
G06F13/28G06F21/606
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Quick Facts
Patent No.
US 11,151,068
App. No.
16/934,518
Granted
Oct 19, 2021
Kind
B1
Abstract

A method of improving meta-channel communications over a secure digital (SD) bus between an SD host and an SD client is described. The method includes accessing, during a current data transfer over data lines of the SD bus, a first direct memory access (DMA) metadata and a second DMA metadata over a command (CMD) line of the SD bus using an enhanced SD direct command. The method also includes establishing, prior to a next data transfer over the data lines of the SD bus, a DMA configuration for the next data transfer based on the first DMA metadata and the second DMA metadata. The method further includes communicating the next data transfer over the data lines of the SD bus according to the DMA configuration.

Claims (48)

1. A method of improving meta-channel communications over a secure digital (SD) bus between an SD host and an SD client, the method comprising:

accessing, during a current data transfer over data lines of the SD bus, a first direct memory access (DMA) metadata and a second DMA metadata over a command (CMD) line of the SD bus using an enhanced SD direct command;

establishing, prior to a next data transfer over the data lines of the SD bus, a DMA configuration for the next data transfer based on the first DMA metadata and the second DMA metadata; and

communicating the next data transfer over the data lines of the SD bus according to the DMA configuration.

2. The method of claim 1 , further comprising:

embedding a first byte of DMA metadata in a first byte of the enhanced SD direct command as the first DMA metadata;

embedding a second byte of DMA metadata in a second byte of the enhanced SD direct command as the second DMA metadata; and

issuing the enhanced SD direct command to the SD client over the CMD line of the SD bus.

3. The method of claim 1 , in which accessing the first DMA metadata and the second DMA metadata comprises:

reading the first DMA metadata from a first byte of an enhanced SD direct response to the enhanced SD direct command; and

reading the second DMA metadata from a second byte of the enhanced SD direct response to the enhanced SD direct command.

4. The method of claim 1 , in which communicating comprises accessing a read packet through a direct memory access (DMA) channel indicated by the DMA configuration.

5. The method of claim 4 , in which accessing comprises:

reading the read packet through the DMA channel over the data lines of the SD bus from the SD client using an SD extended command; and

storing the read packet in a host buffer allocated according to the DMA configuration.

6. The method of claim 1 , in which the first DMA metadata and the second DMA metadata comprise a block count of a read packet and a DMA channel number to access the read packet from the SD client with an SD extended command.

7. The method of claim 6 , in which the SD extended command comprises a CMD53 command.

8. The method of claim 6 , in which the enhanced SD direct command comprises an enhanced CMD52 command.

9. The method of claim 1 , further comprising transmitting a write data packet from the SD host to the SD client over a DMA channel according to the DMA configuration.

10. The method of claim 1 , further comprising incorporating the SD bus between the SD host and the SD client into one of a computing system, a mobile computing device, an Internet of Things device, or virtual reality or augmented reality system.

11. An apparatus configured to improve meta-channel communications over a secure digital (SD) bus between an SD host and an SD client, the apparatus comprising:

a memory comprising an SD device; and

at least one processor coupled to the memory, the processor configured:

to access, during a current data transfer over data lines of the SD bus, a first direct memory access (DMA) metadata and a second DMA metadata over a command (CMD) line of the SD bus using an enhanced SD direct command;

to establish, prior to a next data transfer over the data lines of the SD bus, a DMA configuration for the next data transfer based on the first DMA metadata and the second DMA metadata; and

to communicate the next data transfer over the data lines of the SD bus according to the DMA configuration.

12. The apparatus of claim 11 , in which the processor is further configured:

to embed a first byte of DMA metadata in a first byte of the enhanced SD direct command as the first DMA metadata;

to embed a second byte of DMA metadata in a second byte of the enhanced SD direct command as the second DMA metadata; and

to issue the enhanced SD direct command to the SD client over the CMD line of the SD bus.

13. The apparatus of claim 11 , in which to access the first DMA metadata and the second DMA metadata, the processor is further configured:

to read the first DMA metadata from a first byte of an enhanced SD direct response to the enhanced SD direct command; and

to read the second DMA metadata from a second byte of the enhanced SD direct response to the enhanced SD direct command.

14. The apparatus of claim 11 , in which to communicate, the processor is further configured to access a read packet through a direct memory access (DMA) channel indicated by the DMA configuration.

15. The apparatus of claim 14 , in which to access, the processor is further configured:

to read the read packet through the DMA channel over the data lines of the SD bus from the SD client using an SD extended command; and

to store the read packet in a host buffer allocated according to the DMA configuration.

16. The apparatus of claim 11 , in which the first DMA metadata and the second DMA metadata comprise a block count of a read packet and a DMA channel number to access the read packet from the SD client with an SD extended command.

17. The apparatus of claim 16 , in which the SD extended command comprises a CMD53 command and the enhanced SD direct command comprises an enhanced CMD52 command.

18. A non-transitory computer-readable medium having program code recorded thereon to improve meta-channel communications over a secure digital (SD) bus between an SD host and an SD client, the program code executed by a processor and comprising:

program code to access, during a current data transfer over data lines of the SD bus, a first direct memory access (DMA) metadata and a second DMA metadata over a command (CMD) line of the SD bus using an enhanced SD direct command;

program code to establish, prior to a next data transfer over the data lines of the SD bus, a DMA configuration for the next data transfer based on the first DMA metadata and the second DMA metadata; and

program code to communicate the next data transfer over the data lines of the SD bus according to the DMA configuration.

19. The non-transitory computer-readable medium of claim 18 , in which the program code further comprises:

program code to embed a first byte of DMA metadata in a first byte of the enhanced SD direct command as the first DMA metadata;

program code to embed a second byte of DMA metadata in a second byte of the enhanced SD direct command as the second DMA metadata; and

program code to issue the enhanced SD direct command to the SD client over the CMD line of the SD bus.

20. The non-transitory computer-readable medium of claim 18 , in which the program code further comprises program code to transmit a write data packet from the SD host to the SD client over a DMA channel according to the DMA configuration.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 4, 2021
From: HALDAR, KISHALAY
To: QUALCOMM INCORPORATED
Reel/Frame 055491/0331 →
Cited By (2)
US 12,705,193 US 12,705,340