IP Library Granted Patent US 11,153,191
Granted Patent B2
US 11,153,191 · App. 15/941,854 · Granted Oct 19, 2021

Technologies for timestamping with error correction

Inventors: Yoni Landau (Or-Aqiva, IL); Janardhan H. Satyanarayana (Allentown, PA); Assaf Benhamou (Haifa, IL); Mark A. Bordogna (Andover, MA)
Assignee: Intel Corporation
H04L43/106H04L1/0041H04L1/0045H04L1/0058H04L69/22H04L1/0057
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Quick Facts
Patent No.
US 11,153,191
App. No.
15/941,854
Granted
Oct 19, 2021
Kind
B2
Abstract

Technologies for timestamping data packets with forward error correction is disclosed. Alignment markers may be inserted in a data stream in order to assist with synchronization on the receiving end. After insertion of the alignment markers, a start of frame delimiter or other trigger may be detected, triggering a timestamp corresponding to the start of frame delimiter or other trigger. The data and the timestamp are sent to a remote compute device, which may timestamp the data before removing the alignment markers. With this approach, insertion of the alignment markers does not lead to a deviation in the timestamp of the sending compute device or the receiving compute device.

Claims (85)

1. A compute device for timestamping data packets, the compute device comprising:

a processor;

a memory; and

a network interface controller to:

receive data from another component of the compute device;

insert one or more alignment markers in the data;

detect a trigger pattern in the data after insertion of the one or more alignment markers;

trigger a timestamp corresponding to detection of the trigger pattern; and

send the data to a remote compute device, wherein the network interface controller is further to:

receive additional data from the remote compute device;

detect the trigger pattern in the additional data;

trigger a timestamp corresponding to detection of the trigger pattern in the additional data; and

remove one or more alignment markers in the additional data after detection of the trigger pattern in the additional data.

2. The compute device of claim 1 , wherein the network interface controller is further to:

remove the one or more alignment markers from the data;

remap the one or more alignment markers;

encode the data with a forward error correction algorithm; and

insert the one or more alignment markers in the data as codeword markers in the data.

3. The compute device of claim 1 , wherein the trigger pattern is a start of frame delimiter.

4. The compute device of claim 1 , the data including a plurality of 64-bit blocks, wherein the network interface controller is further to:

add synchronization headers to each of the plurality of 64-bit blocks; and

scramble each of the plurality of 64-bit blocks,

wherein to detect the trigger pattern in the data comprises to detect the trigger pattern in the plurality of 64-bit blocks after addition of the synchronization headers and before scrambling of the plurality of 64-bit blocks.

5. The compute device of claim 1 , comprising the data including a plurality of 64-bit blocks, wherein the network interface controller is further to scramble each of the plurality of 64-bit blocks after insertion of the alignment markers without scrambling the alignment markers.

6. The compute device of claim 1 , wherein the network interface controller is further to remove a portion of an interpacket gap from the data to compensate for the insertion of the alignment markers.

7. The compute device of claim 1 , wherein to send the data to the remote compute device comprises to send the data to the remote compute device at a rate of at least 25 gigabits per second.

8. A method for timestamping data packets by a network interface controller of a compute device, the method comprising:

receiving data from another component of the compute device;

inserting one or more alignment markers in the data;

detecting a trigger pattern in the data after insertion of the one or more alignment markers;

triggering a timestamp corresponding to detection of the trigger pattern;

sending the data to a remote compute device

receiving additional data from the remote compute device;

detecting the trigger pattern in the additional data;

triggering a timestamp corresponding to detection of the trigger pattern in the additional data; and

removing one or more alignment markers in the additional data after detection of the trigger pattern in the additional data.

9. The method of claim 8 , further comprising:

removing the one or more alignment markers from the data;

remapping the one or more alignment markers;

encoding the data with a forward error correction algorithm; and

inserting the one or more alignment markers in the data as codeword markers in the data.

10. The method of claim 8 , wherein the trigger pattern is a start of frame delimiter.

11. The method of claim 8 , the data including a plurality of 64-bit blocks, the method further comprising:

adding synchronization headers to each of the plurality of 64-bit blocks; and

scrambling each of the plurality of 64-bit blocks,

wherein detecting the trigger pattern in the data comprises detecting the trigger pattern in the plurality of 64-bit blocks after addition of the synchronization headers and before scrambling of the plurality of 64-bit blocks.

12. The method of claim 8 , the data including a plurality of 64-bit blocks, the method further comprising scrambling each of the plurality of 64-bit blocks after insertion of the alignment markers without scrambling the alignment markers.

13. The method of claim 8 , further comprising removing a portion of an interpacket gap from the data to compensate for the insertion of the alignment markers.

14. One or more non-transitory machine-readable media comprising a plurality of instructions stored thereon that, when executed, causes a compute device to:

receive data from another component of the compute device;

insert one or more alignment markers in the data;

detect a trigger pattern in the data after insertion of the one or more alignment markers;

trigger a timestamp corresponding to detection of the trigger pattern; and

send the data to a remote compute device;

receive additional data from the remote compute device;

detect the trigger pattern in the additional data;

trigger a timestamp corresponding to detection of the trigger pattern in the additional data; and

remove one or more alignment markers in the additional data after detection of the trigger pattern in the additional data.

15. The one or more non-transitory computer-readable media of claim 14 , wherein the plurality of instructions further causes the compute device to:

remove the one or more alignment markers from the data;

remap the one or more alignment markers;

encode the data with a forward error correction algorithm; and

insert the one or more alignment markers in the data as codeword markers in the data.

16. The one or more non-transitory computer-readable media of claim 14 , wherein the trigger pattern is a start of frame delimiter.

17. The one or more non-transitory computer-readable media of claim 14 , the data including a plurality of 64-bit blocks, wherein the plurality of instructions further causes the compute device to:

add synchronization headers to each of the plurality of 64-bit blocks; and

scramble each of the plurality of 64-bit blocks,

wherein to detect the trigger pattern in the data comprises to detect the trigger pattern in the plurality of 64-bit blocks after addition of the synchronization headers and before scrambling of the plurality of 64-bit blocks.

18. The one or more non-transitory computer-readable media of claim 14 , comprising the data including a plurality of 64-bit blocks, wherein the plurality of instructions further causes the compute device to scramble each of the plurality of 64-bit blocks after insertion of the alignment markers without scrambling the alignment markers.

19. The one or more non-transitory computer-readable media of claim 14 , wherein the plurality of instructions further causes the compute device to remove a portion of an interpacket gap from the data to compensate for the insertion of the alignment markers.

20. A compute device for timestamping data packets, the compute device comprising:

circuitry for receiving data from another component of the compute device;

circuitry for inserting one or more alignment markers in the data;

circuitry for detecting a trigger pattern in the data after insertion of the one or more alignment markers;

circuitry for triggering a timestamp corresponding to detection of the trigger pattern;

circuitry for sending the data to a remote compute device;

circuitry for receiving additional data from the remote compute device;

circuitry for detecting the trigger pattern in the additional data;

circuitry for triggering a timestamp corresponding to detection of the trigger pattern in the additional data; and

circuitry for removing one or more alignment markers in the additional data after detection of the trigger pattern in the additional data.

21. The compute device of claim 20 , further comprising:

circuitry for removing the one or more alignment markers from the data;

circuitry for remapping the one or more alignment markers;

circuitry for encoding the data with a forward error correction algorithm; and

circuitry for inserting the one or more alignment markers in the data as codeword markers in the data.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 5, 2018
From: LANDAU, YONI; SATYANARAYANA, JANARDHAN; BENHAMOU, ASSAF; BORDOGNA, MARK
To: INTEL CORPORATION
Reel/Frame 045987/0424 →
Continuity (2)
Provisional Application 62619689 · Jan 19, 2018
Related Publication 20190044839A1 · Feb 7, 2019