Fault tolerance for power loss imminent circuitry failure

1. A circuit for power control comprising:

a charging circuit including a bidirectional converter to charge a power loss imminent (PLI) capacitor as a backup energy store in case system power is lost; and

an electrical path to couple the charging circuit to the PLI capacitor, the electrical path including a series current-limiting circuit, and a diode coupled in parallel with the current-limiting circuit, the diode with a cathode coupled to the charging circuit and an anode to couple to the PLI capacitor;

wherein the current-limiting circuit is to provide current limitation in boost operation to charge the PLI capacitor, and the diode is to provide a current return path in buck operation to return current from the PLI capacitor to the charging circuit.

2. The circuit of claim 1 , wherein the current-limiting circuit comprises a current-limiting resistor.

3. The circuit of claim 1 , wherein the diode comprises a hot-carrier diode.

4. The circuit of claim 1 , wherein the charging circuit comprises a power management system including a controller.

5. The circuit of claim 4 , wherein the power management system comprises a power management integrated circuit (PMIC).

6. The circuit of claim 4 , wherein the power management system is to detect failure of the PLI capacitor, wherein detection of the failure comprises polling of a pin of the controller.

7. The circuit of claim 4 , wherein the power management system is to detect failure of the PLI capacitor, wherein detection of the failure comprises detection of an interrupt on a pin of the controller.

8. The circuit of claim 1 , wherein the charging circuit is to detect failure of the PLI capacitor, wherein detection of the failure comprises detection of a low voltage condition or detection of an over-current condition.

9. The circuit of claim 1 , wherein the circuit is part of a nonvolatile memory (NVM) device.

10. The circuit of claim 9 , wherein the NVM device comprises a solid state drive (SSD).

11. The circuit of claim 9 , wherein in response to the detection of failure of the PLI capacitor, the charging circuit is further to limit data access of the NVM device.

12. The circuit of claim 11 , wherein limit data access of the NVM device comprises limit data access to the NVM device to read only access.

13. The circuit of claim 11 , wherein limit data access of the NVM device comprises limit write access to the NVM device to unbuffered write access.

14. The circuit of claim 1 , wherein in response to detection of a failure of the PLI capacitor, the charging circuit is to generate an alert signal to indicate a lack of PLI protection.

15. An apparatus to store data, comprising:

a nonvolatile storage medium;

a power loss imminent (PLI) capacitor as a backup energy store in an event that power is lost to the apparatus; and

a power management circuit including a bidirectional power converter to charge the PLI capacitor, the power converter to couple to the PLI capacitor through an electrical path including a series current-limiter and a diode coupled in parallel with the current-limiter, the diode with a cathode coupled to the power converter and an anode coupled to the PLI capacitor;

wherein the current-limiter is to provide current limitation in boost operation to charge the PLI capacitor, and the diode is to provide a current return path in buck operation to return current from the PLI capacitor to the bidirectional power converter; and

wherein in response to detection of a failure of the PLI capacitor, the power management circuit is to generate an alert signal.

16. The apparatus of claim 15 , wherein the power management circuit comprises a power management integrated circuit (PMIC).

17. The apparatus of claim 15 , wherein the power management circuit is to detect failure of the PLI capacitor, wherein detection of the failure comprises detection of a low voltage condition or detection of an over-current condition.

18. The apparatus of claim 15 , wherein the power management circuit is to detect failure of the PLI capacitor, wherein in response to the detection of failure of the PLI capacitor, the power management circuit is further to limit data access of the nonvolatile storage medium, including to limit data access to read only access, or to limit write access to unbuffered write access.

19. The apparatus of claim 15 , wherein the power management circuit is to generate an alert to management of a host system incorporating the apparatus in response to detection of failure of the PLI capacitor.

20. The apparatus of claim 15 , further comprising:

a host processor device including a multi-core processor;

a display communicatively coupled to host processor;

a network interface communicatively coupled to host processor; or

a battery to power the apparatus.