Drive substrate for camera and broadcast camera
A drive substrate for a camera and a broadcast camera which are free from the occurrence of bit errors in video over a low to high temperature range while achieving reduction in a production cost and development time are provided. The phase of a clock is appropriately adjusted by repeating the processes of shifting the clock phase in a first period within a blanking period during which effective pixel data of each frame in a video signal is not used, detecting the occurrence/non-occurrence of a bit error based on the phase-shifted clock in a second period within the blanking period, and further shifting the clock phase in a third period within the blanking period.
1. A drive substrate for a camera that receives video data from a sensor substrate and performs signal processing, comprising:
a PLL circuit configured to shift a phase of a clock; and
a phase shift control unit configured to control the PLL circuit to shift the phase of the clock in a first period within a blanking period during which effective pixel data of a frame in the video data is not used and to detect whether or not bit errors occur in the phase-shifted clock in a second period within the blanking period.
2. The drive substrate for a camera of claim 1 , wherein when the bit errors occur in the second period, the phase shift control unit controls the PLL circuit to shift the phase of the clock in a third period within the blanking period and adjusts the phase of the clock by repeating the processes from the first period to the third period for each frame.
3. The drive substrate for a camera of claim 1 , wherein the phase shift control unit counts a line start code and a line end code for multiple lines in the second period, and detects an occurrence of the bit errors when the count value is smaller than a predetermined set value.
4. A broadcast camera comprising:
the drive substrate for the camera described in claim 1 .
5. The drive substrate for a camera of claim 2 , wherein the phase shift control unit counts a line start code and a line end code for multiple lines in the second period, and detects an occurrence of the bit errors when the count value is smaller than a predetermined set value.
6. A broadcast camera comprising:
the drive substrate for the camera described in claim 2 .
7. A broadcast camera comprising:
the drive substrate for the camera described in claim 3 .
8. A clock phase control method for a drive substrate for a camera, comprising:
causing a PLL circuit to shift a phase of a clock in a first period within a blanking period during which effective pixel data of a frame in video data is not used;
detecting whether or not bit errors occur in the phase-shifted clock in a second period within the blanking period;
causing the PLL circuit to shift the phase of the clock in a third period within the blanking period when the bit errors occur in the second period; and
adjusting the phase of the clock by repeating the processes from the first period to the third period for each frame.