IP Library Granted Patent US 11,199,591
Granted Patent B2
US 11,199,591 · App. 16/802,064 · Granted Dec 14, 2021

Current detection circuit

Inventors: Yasuhiro Kakitsuka (Fujisawa Kanagawa, JP); Kazuyasu Minami (Yokohama Kanagawa, JP); Takaya Yasuda (Kawasaki Kanagawa, JP)
Assignees: KABUSHIKI KAISHA TOSHIBA; TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
G01R31/52G01R19/16504
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Quick Facts
Patent No.
US 11,199,591
App. No.
16/802,064
Granted
Dec 14, 2021
Kind
B2
Abstract

A current detection circuit includes an N-type first transistor configured to supply a first current to an output terminal, an N-type second transistor that constitutes a current mirror circuit with the first transistor, a comparison circuit configured to output a detection result showing whether or not the first current is larger than a predetermined threshold based on a current flowing through the second transistor, a ground fault detection circuit configured to output a result detecting a ground fault of the output terminal, and a logical circuit configured to output a current detection signal showing whether or not the first current is an overcurrent based on the detection result of the comparison circuit and the ground fault detection result of the ground fault detection circuit.

Claims (24)

1. A current detection circuit comprising:

an N-type first transistor configured to supply a first current to an output terminal;

an N-type second transistor that constitutes a current mirror circuit with the first transistor;

a comparison circuit configured to output a detection result showing whether or not the first current is larger than a predetermined threshold based on a current flowing through the second transistor;

a ground fault detection circuit configured to output a result detecting a ground fault of the output terminal; and

a logical circuit configured to output a current detection signal showing whether or not the first current is an overcurrent based on the detection result of the comparison circuit and the ground fault detection result of the ground fault detection circuit.

2. The current detection circuit according to claim 1 , wherein

the ground fault detection circuit includes:

a third transistor that is brought into conduction by an occurrence of the ground fault at the output terminal;

a fourth transistor that constitutes a current mirror circuit with the third transistor; and

a ground fault detection result output circuit configured to generate the ground fault detection result based on a current flowing through the fourth transistor.

3. The current detection circuit according to claim 2 , further comprising a differential amplifier configured to make a source potential of the first transistor and a source potential of the second transistor a same so that a current proportional to the first current flows through the second transistor, wherein

the ground fault detection circuit further includes:

a first diode that is connected between one input terminal of the differential amplifier and a connection point between the first transistor and the output terminal;

a second diode that is connected between the third transistor and the one input terminal of the differential amplifier; and

a current source that is connected between the one input terminal of the differential amplifier and a reference potential point.

4. The current detection circuit according to claim 3 , further comprising a third diode that is connected between the second transistor and another input terminal of the differential amplifier.

5. The current detection circuit according to claim 3 , wherein

the ground fault detection circuit further includes:

a resistor that is connected between the fourth transistor and the reference potential point; and

a fifth transistor having a control terminal connected to a connection point between the fourth transistor and the resistor, a first terminal connected to a power supply terminal via an active load, and a second terminal connected to the reference potential point.

6. The current detection circuit according to claim 5 , further comprising an inverter configured to invert a voltage at the first terminal of the fifth transistor to apply the inverted voltage to the logical circuit.

7. The current detection circuit according to claim 5 , further comprising a P-type sixth transistor connected between the fourth transistor and the resistor and having a control terminal to which a predetermined voltage is applied.

8. The current detection circuit according to claim 5 , further comprising an N-type seventh transistor connected between the fourth transistor and the resistor and having a control terminal that is connected to the power supply terminal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 26, 2020
From: KAKITSUKA, YASUHIRO; MINAMI, KAZUYASU; YASUDA, TAKAYA
To: KABUSHIKI KAISHA TOSHIBA; TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
Reel/Frame 051940/0890 →
Priority Claims (1)
JP JP2019-098774 · May 27, 2019 · national
Continuity (1)
Related Publication 20200379054A1 · Dec 3, 2020