IP Library Granted Patent US 11,201,186
Granted Patent B2
US 11,201,186 · App. 16/069,652 · Granted Dec 14, 2021

Solid-state imaging device, driving method therefor, and electronic apparatus

Inventors: Akira Tanaka (Kanagawa, JP); Shohei Shimada (Kanagawa, JP)
Assignee: Sony Corporation
H01L27/14643H01L27/146H01L27/14605H01L27/14612H01L27/14641H01L27/14645H01L27/14647H01L27/14667H04N5/355H04N5/35554H04N5/3696H04N5/36961H04N5/374H04N5/37457H04N9/04557H04N9/04561H04N9/04563H01L27/14621H01L27/14627
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Quick Facts
Patent No.
US 11,201,186
App. No.
16/069,652
Granted
Dec 14, 2021
Kind
B2
Abstract

The present technology relates to a solid-state imaging device, a driving method therefor, and an electronic apparatus capable of acquiring a signal to detect phase difference and a signal to generate a high dynamic range image at the same time. The solid-state imaging device includes a pixel array unit in which a plurality of pixels that receives light of a same color is arranged under one on-chip lens. The plurality of pixels uses at least one pixel transistor in a sharing manner, some pixels out of the plurality of pixels are set to have a first exposure time, and other pixels are set to have a second exposure time shorter than the first exposure time. The present technology can be applied to, for example, a solid-state imaging device or the like.

Claims (48)

1. A solid-state imaging device comprising:

an on-chip lens;

a pixel array unit arranged under the on-chip lens, the pixel array unit including a plurality of pixels, wherein each pixel of the plurality of pixels receives light of a first color; and

a pixel transistor, wherein each pixel of the plurality of pixels uses the pixel transistor in a sharing manner, the plurality of pixels comprising:

one or more first pixels configured to output a first pixel signal associated with a first exposure time, and

one or more second pixels configured to output a second pixel signal associated with a second exposure time,

wherein the second exposure time is shorter than the first exposure time and each of the first pixels outputs the first pixel signal at or near a same time as each of the second pixels outputs the second pixel signal; and

wherein the solid-state imaging device:

detects a phase difference based on the first pixel signal output by the one or more first pixels, and

generates a high dynamic range based on the first pixel signal output by the one or more first pixels and the second pixel signal output by the one or more second pixels.

2. The solid-state imaging device according to claim 1 , wherein the plurality of pixels comprises two pixels in a vertical direction and two pixels in a lateral direction.

3. The solid-state imaging device according to claim 1 , wherein the one or more first pixels comprise two or more pixels arrayed in an oblique direction.

4. The solid-state imaging device according to claim 1 , wherein the phase difference is detected and the high dynamic range is generated at or near a second same time.

5. The solid-state imaging device according to claim 1 , wherein the first pixels comprise two or more pixels symmetrically arranged with respect to an optical axis.

6. The solid-state imaging device according to claim 1 , wherein each pixel of the plurality of pixels uses a reset transistor, an amplification transistor, and a selection transistor in a sharing manner.

7. The solid-state imaging device according to claim 1 ,

wherein each pixel of the plurality of pixels uses a floating diffusion region in a sharing manner, and

pixel signals of at least two pixels of the plurality of pixels are added at the floating diffusion region and are output.

8. The solid-state imaging device according to claim 1 , wherein the solid-state imaging device has a pixel structure in which a transistor region formed with the at least one pixel transistor and a photodiode region formed with a photodiode are stacked.

9. The solid-state imaging device according to claim 1 , wherein the solid-state imaging device has a pixel structure in which two photodiodes formed at different depth positions inside a semiconductor substrate and a photoelectric conversion film formed on the semiconductor substrate are stacked.

10. The solid-state imaging device according to claim 1 , wherein the solid-state imaging device has a pixel structure in which a photodiode formed inside a semiconductor substrate and a photoelectric conversion film formed on the semiconductor substrate are stacked.

11. The solid-state imaging device according to claim 10 , wherein a color filter of a second color complementary to the first color is provided on the semiconductor substrate.

12. The solid-state imaging device according to claim 10 , wherein a color filter of a primary color is provided on the semiconductor substrate.

13. An electronic apparatus comprising a solid-state imaging device including:

an on-chip lens;

a pixel array unit arranged under the on-chip lens, the pixel array unit including a plurality of pixels, wherein each pixel of the plurality of pixels receives light of a first color; and

a pixel transistor, wherein each pixel of the plurality of pixels uses the pixel transistor in a sharing manner, the plurality of pixels comprising:

one or more first pixels configured to output a first pixel signal associated with a first exposure time, and

one or more second pixels configured to output a second pixel signal associated with a second exposure time,

wherein the second exposure time is shorter than the first exposure time and each of the first pixels outputs the first pixel signal at or near a same time as each of the second pixels outputs the second pixel signal; and

wherein the solid-state imaging device:

detects a phase difference based on the first pixel signal output by the one or more first pixels, and

generates a high dynamic range based on the first pixel signal output by the one or more first pixels and the second pixel signal output by the one or more second pixels.

14. The electronic apparatus according to claim 13 , wherein the plurality of pixels comprises two pixels in a vertical direction and two pixels in a lateral direction.

15. The electronic apparatus according to claim 13 , wherein the first pixels comprise two or more pixels arrayed in an oblique direction.

16. The electronic apparatus according to claim 13 , wherein the phase difference is detected and the high dynamic range is generated at or near a second same time.

17. The electronic apparatus according to claim 13 , wherein the first pixels comprise two or more pixels symmetrically arranged with respect to an optical axis.

18. The electronic apparatus according to claim 13 , wherein each pixel of the plurality of pixels uses a reset transistor, an amplification transistor, and a selection transistor in a sharing manner.

19. A driving method for a solid-state imaging device, the device including:

an on-chip lens;

a pixel array unit arranged under the on-chip lens, the pixel array unit including a plurality of pixels, wherein each pixel of the plurality of pixels receives light of a first color;

at least one pixel transistor, wherein each pixel of the plurality of pixels uses the at least one pixel transistor in a sharing manner,

wherein the method comprises:

outputting, by each of one or more first pixels of the plurality of pixels, a first pixel signal associated with a first exposure time;

outputting, by each of one or more second pixels of the plurality of pixels, a second pixel signal associated with a second exposure time, wherein the second exposure time is shorter than the first exposure time, and wherein each of the first pixels outputs the first pixel signal at or near a same time as each of the second pixels outputs the second pixel signal,

detecting, based on the first pixel signal output by the one or more first pixels, a phase difference; and

generating, based on the first pixel signal output by the one or more first pixels and the second pixel signal output by the one or more second pixels, a high dynamic range.

20. The method of claim 19 , wherein the plurality of pixels comprises two pixels in a vertical direction and two pixels in a lateral direction.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 12, 2018
From: TANAKA, AKIRA; SHIMADA, SHOHEI
To: SONY CORPORATION
Reel/Frame 046334/0920 →
Priority Claims (1)
JP JP2016-008728 · Jan 20, 2016 · national
Continuity (1)
Related Publication 20190019835A1 · Jan 17, 2019
Cited By (1)
US 12,300,722