IP Library › Granted Patent US 11,210,168
Granted Patent B1
US 11,210,168 · App. 16/912,397 · Granted Dec 28, 2021

Error handling optimization in memory sub-system mapping

Inventor: Johnny A. Lam (Firestone, CO)
Assignee: Micron Technology, Inc.
G06F11/1068G06F11/076G06F11/0772G06F11/203G06F12/0246G06F12/0253G06F2212/403G06F2212/7201G06F2212/7211
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,210,168
App. No.
16/912,397
Granted
Dec 28, 2021
Kind
B1
Abstract

A system includes a memory device having blocks of memory cells. A processing device is operatively coupled to the memory device, the processing device to detect an error event triggered within a source block of the memory cells. In response to detection of the error event, the processing device is to read data from the source block; write the data into a mitigation block that is different than the source block; and replace, in a block set map data structure, a first identifier of the source block with a second identifier of the mitigation block. The block set map data structure includes block location metadata for a data group, of the memory device, that includes the data.

Claims (64)

1. A system comprising:

a memory device comprising a plurality of blocks of memory cells; and

a processing device operatively coupled to the memory device, the processing device to:

detect an error event triggered within a source block of the memory cells; and

in response to detection of the error event:

read data from the source block;

write the data into a mitigation block that is different than the source block; and

replace, in a block set map data structure, a first identifier of the source block with a second identifier of the mitigation block, wherein the block set map data structure comprises block location metadata for a data group, of the memory device, that includes the data.

2. The system of claim 1 , wherein the data group is associated with a logical block address (LBA) space zone comprising a plurality of sequential LBAs that are sequentially mapped to a plurality of sequential physical addresses.

3. The system of claim 1 , wherein the error event comprises at least one of a read disturb event, a program fail handling event, or a wear leveling event.

4. The system of claim 1 , wherein the mitigation block is an overprovisioned block of the memory cells that is located within the same plane as the source block.

5. The system of claim 1 , wherein, while writing the data into the mitigation block, the processing device is further to:

detect a read error at the source block in response to a read request;

determine that the mitigation block exists;

read the data from the mitigation block; and

return the data to a host system that requested the data.

6. The system of claim 1 , wherein, in response to a read request to the source block, the processing device is to return data from the mitigation block identified by the block set map data structure.

7. The system of claim 1 , wherein to replace the first identifier with the second identifier, the processing device is further to:

lock a zone, which includes the source block, to prevent subsequent write requests and read requests directed at the zone;

replace the first identifier with the second identifier after lock of the zone;

unlock the zone after the replacement; and

push the first identifier of the source block to a garbage collection pool.

8. A method comprising:

detecting, by a processing device coupled to a memory device, reaching an error event threshold within a source block of a plurality of blocks of memory cells of the memory device; and

in response to the detecting:

reading data from the source block;

writing the data into a mitigation block that is different than the source block; and

replacing, in a block set map data structure, a first identifier of the source block with a second identifier of the mitigation block, wherein the block set map data structure comprises block location metadata for a data group, of the memory device, that includes the data.

9. The method of claim 8 , wherein the error event threshold is associated with at least one of a read disturb event, a program fail handling event, or a wear leveling event, and the method further comprises confirming the error event threshold is associated with an error event via performing a scan of the memory device.

10. The method of claim 8 , wherein the mitigation block is an overprovisioned block of the memory cells that is located within the same plane as the source block.

11. The method of claim 8 , further comprising, during the writing:

detecting a read error at the source block in response to a read request;

determining that the mitigation block exists;

reading the data from the mitigation block; and

returning the data to a host system that requested the data.

12. The method of claim 8 , wherein, in response to a read request to the source block, the method further comprises returning data from the mitigation block identified by the block set map data structure.

13. The method of claim 8 , wherein the replacing the first identifier with the second identifier further comprises:

determining that a write pointer for the mitigation block is equal to a pointer in the source block;

locking a zone, which includes the source block, to prevent subsequent write requests and read requests directed at the zone;

performing the replacing after locking of the zone;

unlocking the zone after performing the replacing; and

pushing the first identifier of the source block to a garbage collection pool.

14. A non-transitory computer-readable medium storing instructions, which when executed by a processing device coupled to a memory device, cause the processing device to perform operations comprising:

identifying, among a plurality of blocks of memory cells, a mitigation block that stores migrated data from a source block that incurred an error event;

retrieving new metadata associated with a location of the mitigation block; and

swapping, within a block set map data structure including a mapping of the source block, old metadata associated with a location of the source block with the new metadata to remap the source block to the mitigation block.

15. The non-transitory computer-readable medium of claim 14 , wherein to perform the swapping out, the operations further comprise:

determining that a write pointer for the mitigation block is equal to a pointer in the source block;

before the swapping, locking a zone that includes the source block, wherein the locking is to prevent subsequent write requests and read requests directed at the zone;

swapping, within the block set map data structure after the locking, a first identifier of the source block with a second identifier of the mitigation block;

unlocking the zone after the swapping; and

pushing the first identifier of the source block to a garbage collection pool.

16. The non-transitory computer-readable medium of claim 15 , wherein the operations further comprise, between the locking and the unlocking of the zone, completing any inflight write operations directed at a block set containing the mitigation block.

17. The non-transitory computer-readable medium of claim 14 , wherein the operations further comprise:

receiving a read request from a host system to the source block;

accessing the mapping within the block set map data structure; and

transmitting, to the host system based on the mapping, the migrated data stored in the mitigation block.

18. The non-transitory computer-readable medium of claim 14 , wherein the error event comprises at least one of a read disturb event, a program fail handling event, or a wear leveling event.

19. The non-transitory computer-readable medium of claim 14 , wherein the mitigation block is an overprovisioned block of the memory cells that is located within the same plane as the source block.

20. The non-transitory computer-readable medium of claim 14 , wherein the operations further comprise:

detecting an error event triggered within a source block of the memory cells; and

in response to detection of the error event:

reading data from the source block; and

writing the data into the mitigation block that is different than the source block.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2020
From: LAM, JOHNNY A.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 053043/0700 →
Cited By (1)
US 12,217,814