IP Library › Granted Patent US 11,222,845
Granted Patent B2
US 11,222,845 · App. 16/593,884 · Granted Jan 11, 2022

Semiconductor device package

Inventors: Po-I Wu (Kaohsiung, TW); Chen-Chao Wang (Kaohsiung, TW)
Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
H01L23/5283H01L23/5286
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Quick Facts
Patent No.
US 11,222,845
App. No.
16/593,884
Granted
Jan 11, 2022
Kind
B2
Abstract

A semiconductor device includes a dielectric layer, a first conductive layer penetrating the dielectric layer, and a grounding structure disposed within the dielectric layer and adjacent to the first conductive layer. The dielectric layer has a first surface and a second surface opposite the first surface. The first conductive layer has a first portion and a second portion connected to the first portion. The first portion has a width greater than that of the second portion.

Claims (31)

1. A semiconductor device package, comprising:

a dielectric layer having a first surface and a second surface opposite the first surface;

a first conductive layer penetrating the dielectric layer, the first conductive layer having a first portion and a second portion connected to the first portion, the first portion having a width greater than that of the second portion;

a grounding structure disposed within the dielectric layer and adjacent to the first conductive layer; and

an electronic component disposed over the dielectric layer, the electronic component having a terminal electrically connected to a part of the second portion of the first conductive layer that is spaced apart from the first portion of the first conductive layer.

2. The semiconductor device package as claimed in claim 1 , wherein the second portion of the first conductive layer penetrating from the first surface of the dielectric layer to the second surface of the dielectric layer, and the first portion of the first conductive layer is exposed from the dielectric layer and disposed on the first surface of the dielectric layer.

3. The semiconductor device package as claimed in claim 1 , wherein the first portion of the first conductive layer is disposed within the dielectric layer and adjacent to the second surface of the dielectric layer, and the second portion of the first conductive layer is disposed within the dielectric layer and on the first portion of the first conductive layer.

4. The semiconductor device package as claimed in claim 1 , wherein the first conductive layer further includes a third portion connected to the second portion, the first portion and the third portion are connected to opposing sides of the second portion, and a width of the third portion is greater than that of the second portion.

5. The semiconductor device package as claimed in claim 4 , wherein the first portion of the first conductive layer is exposed from the dielectric layer and disposed on the first surface of the dielectric layer, and the third portion is disposed within the dielectric layer and adjacent to the second surface of the dielectric layer.

6. The semiconductor device package as claimed in claim 1 , further comprising:

a second conductive layer penetrating the dielectric layer, the second conductive layer disposed adjacent to the first conductive layer and spaced apart from the first conductive layer, the second conductive layer having a first portion and a second portion connected to the first portion, the first portion having a width greater than that of the second portion.

7. The semiconductor device package as claimed in claim 6 , wherein the first conductive layer and the second conductive layer are configured to transmit differential signals.

8. The semiconductor device package as claimed in claim 1 , wherein a ratio of the width of the first portion to the width of the second portion is about 1.5 to about 4.0.

9. The semiconductor device package as claimed in claim 1 , wherein the grounding structure and the first conductive layer extend along an extending direction, and the grounding structure is shorter than the first conductive layer along the extending direction.

10. The semiconductor device package as claimed in claim 1 , wherein a width of the first grounding structure is greater than the width of the first conductive layer.

11. A semiconductor device package, comprising:

a substrate;

a dielectric layer disposed on the substrate, the dielectric layer having a first surface and a second surface opposite the first surface;

a first conductive layer penetrating the dielectric layer, the first conductive layer having a first portion and a second portion connected to the first portion, the first portion having a width greater than that of the second portion;

an electronic component disposed over the dielectric layer and electrically connected to the first conductive layer;

a grounding structure disposed within the dielectric layer and adjacent to the first conductive layer; and

an electronic component disposed over the dielectric layer, the electronic component having a terminal electrically connected to a part of the second portion of the first conductive layer that is spaced apart from the first portion of the first conductive layer.

12. The semiconductor device package as claimed in claim 11 , wherein the first conductive layer further includes a third portion connected to the second portion, the first portion and the third portion are connected to opposing sides of the second portion, and a width of the third portion is greater than that of the second portion.

13. The semiconductor device package as claimed in claim 12 , wherein the first portion of the first conductive layer is exposed from the dielectric layer and disposed on the first surface of the dielectric layer, and the third portion is disposed within the dielectric layer and adjacent to the second surface of the dielectric layer.

14. The semiconductor device package as claimed in claim 11 , further comprising:

a second conductive layer penetrating the dielectric layer, the second conductive layer disposed adjacent to the first conductive layer and spaced apart from the first conductive layer, the second conductive layer having a first portion and a second portion connected to the first portion, the first portion having a width greater than that of the second portion.

15. The semiconductor device package as claimed in claim 14 , wherein the first conductive layer and the second conductive layer are configured to transmit differential signals.

16. The semiconductor device package as claimed in claim 11 , wherein a ratio of the width of the first portion of the first conductive layer to the second portion of the first conductive layer is about 1.5 to about 4.0.

17. The semiconductor device package as claimed in claim 11 , wherein the grounding structure and the first conductive layer extend along an extending direction, and the grounding structure is shorter than the first conductive layer along the extending direction.

18. The semiconductor device package as claimed in claim 11 , wherein a width of the first grounding structure is greater than the width of the first conductive layer.

19. The semiconductor device package as claimed in claim 12 , wherein the first grounding structure has a top portion disposed on the first surface of the dielectric layer and a bottom portion disposed within the dielectric layer, wherein a width of the top portion is greater than the width of the first portion or the width of the third portion, and a width of the bottom portion is greater than the width of the first portion or the width of the third portion.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2019
From: WU, PO-I; WANG, CHEN-CHAO
To: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Reel/Frame 051221/0620 →
Continuity (1)
Related Publication 20210104461A1 · Apr 8, 2021