Semiconductor device having ferroelectric material and method of fabricating the same
A semiconductor device is provided. The semiconductor device includes a substrate, an electrode stack disposed on the substrate, the electrode stack including an interlayer insulation layer and a gate electrode structure that are alternately stacked in a direction perpendicular to the substrate, a trench penetrating the electrode stack to expose sidewall surfaces of the interlayer insulation layer and the gate electrode structure, a gate dielectric layer disposed along a sidewall surface of the trench, the gate dielectric layer including a ferroelectric portion and a non-ferroelectric portion, and a channel layer disposed to adjacent to the gate dielectric layer. The ferroelectric portion is in contact with the gate electrode structure, and the non-ferroelectric portion is in contact with the interlayer insulation layer.
1. A semiconductor device comprising:
a substrate;
an electrode stack disposed on the substrate, the electrode stack including an interlayer insulation layer and a gate electrode structure that are alternately stacked in a direction perpendicular to the substrate;
a trench penetrating the electrode stack to expose sidewall surfaces of the interlayer insulation layer and the gate electrode structure;
a gate dielectric layer disposed along a sidewall surface of the trench, the gate dielectric layer including a ferroelectric portion and a non-ferroelectric portion; and
a channel layer disposed adjacent to the gate dielectric layer,
wherein the ferroelectric portion is in contact with the gate electrode structure and the non-ferroelectric portion is in contact with the interlayer insulation layer,
wherein the gate electrode structure comprises:
a crystallization seed layer disposed to be in contact with the ferroelectric portion of the gate dielectric layer; and
a gate electrode layer disposed to be in contact with the crystallization seed layer.
2. The semiconductor device of claim 1 ,
wherein the ferroelectric portion is disposed discontinuously in the gate dielectric layer along the direction perpendicular to the substrate.
3. The semiconductor device of claim 1 ,
wherein the gate dielectric layer comprises at least one of hafnium oxide, zirconium oxide, and hafnium zirconium oxide.
4. The semiconductor device of claim 1 ,
wherein the ferroelectric portion and the non-ferroelectric portion have different crystal structures.
5. The semiconductor device of claim 1 ,
wherein
the crystallization seed layer includes a crystalline conductive material and has a predetermined crystallographic preferred orientation surface; and
the gate electrode layer has lower electrical resistance than the crystallization seed layer.
6. The semiconductor device of claim 1 ,
wherein the crystallization seed layer comprises at least one of titanium nitride (TiN), tantalum nitride (TaN), iridium oxide (IrO2) and polysilicon.
7. The semiconductor device of claim 1 ,
wherein the gate electrode layer comprises at least one of tungsten (W), molybdenum (Mo), cobalt (Co), and ruthenium (Ru).